Datasheet ADN2891 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | 3.3 V, 3.2 Gbps Limiting Amplifier |
| Pages / Page | 16 / 3 — Data Sheet. ADN2891. SPECIFICATIONS. Table 1. Parameter. Min. Typ. Max. … |
| Revision | B |
| File Format / Size | PDF / 603 Kb |
| Document Language | English |
Data Sheet. ADN2891. SPECIFICATIONS. Table 1. Parameter. Min. Typ. Max. Unit. Test Conditions/Comments
Model Line for this Datasheet
Text Version of Document
Data Sheet ADN2891 SPECIFICATIONS
Test Conditions: VCC = 2.9 V to 3.6 V, VEE = 0 V, TA = −40°C to +95°C, unless otherwise noted.
Table 1. Parameter Min Typ Max Unit Test Conditions/Comments
QUANTIZER DC CHARACTERISTICS Input Voltage Range 1.8 2.8 V p-p At PIN or NIN, dc-coupled Input Common Mode 2.1 2.7 V DC-coupled Differential Input Range 2.0 V p-p AC-coupled Differential Input Sensitivity 5.2 3.5 mV p-p 3.2 Gbps, PRBS 223 − 1, BER ≤ 10−10 Input Offset Voltage 100 µV Input RMS Noise 235 µV rms Input Resistance 50 Ω Single-ended Input Capacitance 0.65 pF QUANTIZER AC CHARACTERISTICS Input Data Rate 155 3200 Mb/s Small Signal Gain 50 dB Differential S11 −10 dB Differential, f < 3.2 GHz S22 −10 dB Differential, f < 3.2 GHz Random Jitter 4.0 6.4 ps rms Input ≥ 10 mV p-p, OC-48, PRBS 223 − 1 Deterministic Jitter 9.0 34 ps p-p Input ≥ 10 mV p-p, OC-48, PRBS 223 − 1 Low Frequency Cutoff 30 kHz CAZ = Open 1.0 kHz CAZ = 0.0 1 µF Power Supply Rejection Ratio 45 dB f < 10 MHz LOSS OF SIGNAL DETECTOR (LOS) LOS Assert Level 1.9 3.5 5.6 mV p-p RTHRADJ = 100 kΩ 19 35 53 mV p-p RTHRADJ = 1 kΩ Electrical Hysteresis 2.4 5.0 dB OC-3, PRBS 223 − 1 2.75 5.0 dB OC-48, PRBS 223 − 1 LOS Assert Time 950 ns DC-coupled LOS De-Assert Time 62 ns DC-coupled RSSI Input Current Range 5 1000 µA RSSI Output Linearity 2 % 5 µA < IIN ≤ 1000 µA Gain 1.0 mA/mA IRSSI/IPD Offset 145 nA Difference between measured RSSI output and PD_CATHODE (input) current of 5 µA Compliance Voltage VCC − 0.9 VCC − 0.4 V Measured at PD_CATHODE, with I = 5 µA or I = 1 mA POWER SUPPLIES VCC 2.9 3.3 3.6 V ICC 45 49 mA OPERATING TEMPERATURE RANGE −40 +25 +95 °C TMIN to TMAX CML OUTPUT CHARACTERISTICS Output Impedance 50 Ω Single-ended Output Voltage Swing 600 660 850 mV p-p Differential Output Rise and Fall Time 80 130 ps 20% to 80% Rev. B | Page 3 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION LIMITING AMPLIFIER Input Buffer CML Output Buffer LOSS OF SIGNAL (LOS) DETECTOR RECEIVED SIGNAL STRENGTH INDICATOR (RSSI) SQUELCH MODE APPLICATIONS PCB DESIGN GUIDELINES Output Buffer Power Supply and Ground Planes PCB Layout Soldering Guidelines for the LFCSP OUTLINE DIMENSIONS ORDERING GUIDE
Test Conditions: VCC = 2.9 V to 3.6 V, VEE = 0 V, TA = −40°C to +95°C, unless otherwise noted.
Table 1. Parameter Min Typ Max Unit Test Conditions/Comments
QUANTIZER DC CHARACTERISTICS Input Voltage Range 1.8 2.8 V p-p At PIN or NIN, dc-coupled Input Common Mode 2.1 2.7 V DC-coupled Differential Input Range 2.0 V p-p AC-coupled Differential Input Sensitivity 5.2 3.5 mV p-p 3.2 Gbps, PRBS 223 − 1, BER ≤ 10−10 Input Offset Voltage 100 µV Input RMS Noise 235 µV rms Input Resistance 50 Ω Single-ended Input Capacitance 0.65 pF QUANTIZER AC CHARACTERISTICS Input Data Rate 155 3200 Mb/s Small Signal Gain 50 dB Differential S11 −10 dB Differential, f < 3.2 GHz S22 −10 dB Differential, f < 3.2 GHz Random Jitter 4.0 6.4 ps rms Input ≥ 10 mV p-p, OC-48, PRBS 223 − 1 Deterministic Jitter 9.0 34 ps p-p Input ≥ 10 mV p-p, OC-48, PRBS 223 − 1 Low Frequency Cutoff 30 kHz CAZ = Open 1.0 kHz CAZ = 0.0 1 µF Power Supply Rejection Ratio 45 dB f < 10 MHz LOSS OF SIGNAL DETECTOR (LOS) LOS Assert Level 1.9 3.5 5.6 mV p-p RTHRADJ = 100 kΩ 19 35 53 mV p-p RTHRADJ = 1 kΩ Electrical Hysteresis 2.4 5.0 dB OC-3, PRBS 223 − 1 2.75 5.0 dB OC-48, PRBS 223 − 1 LOS Assert Time 950 ns DC-coupled LOS De-Assert Time 62 ns DC-coupled RSSI Input Current Range 5 1000 µA RSSI Output Linearity 2 % 5 µA < IIN ≤ 1000 µA Gain 1.0 mA/mA IRSSI/IPD Offset 145 nA Difference between measured RSSI output and PD_CATHODE (input) current of 5 µA Compliance Voltage VCC − 0.9 VCC − 0.4 V Measured at PD_CATHODE, with I = 5 µA or I = 1 mA POWER SUPPLIES VCC 2.9 3.3 3.6 V ICC 45 49 mA OPERATING TEMPERATURE RANGE −40 +25 +95 °C TMIN to TMAX CML OUTPUT CHARACTERISTICS Output Impedance 50 Ω Single-ended Output Voltage Swing 600 660 850 mV p-p Differential Output Rise and Fall Time 80 130 ps 20% to 80% Rev. B | Page 3 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION LIMITING AMPLIFIER Input Buffer CML Output Buffer LOSS OF SIGNAL (LOS) DETECTOR RECEIVED SIGNAL STRENGTH INDICATOR (RSSI) SQUELCH MODE APPLICATIONS PCB DESIGN GUIDELINES Output Buffer Power Supply and Ground Planes PCB Layout Soldering Guidelines for the LFCSP OUTLINE DIMENSIONS ORDERING GUIDE
