Datasheet ADN2890 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | 3.3 V 2.7 Gb/s Limiting Amplifier |
| Pages / Page | 12 / 7 — Data Sheet. ADN2890. TYPICAL PERFORMANCE CHARACTERISTICS. 0.96 0.88. … |
| Revision | B |
| File Format / Size | PDF / 350 Kb |
| Document Language | English |
Data Sheet. ADN2890. TYPICAL PERFORMANCE CHARACTERISTICS. 0.96 0.88. VERTICAL SCALE: 100mV/DIV. 0.80 0.72 0.64 0.56 0.48 0.40
Model Line for this Datasheet
Text Version of Document
Data Sheet ADN2890 TYPICAL PERFORMANCE CHARACTERISTICS 0.96 0.88 VERTICAL SCALE: 100mV/DIV 0.80 0.72 0.64 0.56 0.48 0.40 RSSI_OUT (mA) 0.32 0.24 0.16 0.08
04509-0-002
0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
04509-0-020
RSSI_IN (mA)
Figure 3. RSSI Output vs. Average PIN Photodiode Current Figure 6. Eye Diagram at 3.2 Gb/s
0.014 0.012 VERTICAL SCALE: 100mV/DIV 0.010 0.008 0.006 TRIP POINT (V) L OS 0.004 0.002
04509-0-009
010 100 1k 10k 100k
04509-0-021
RTH (
Ω
)
Figure 4. LOS Trip Point vs. Threshold Adjust Resistor Figure 7. Eye Diagram at 2.488 Gb/s
70 60 50 40 30 20 SUPPLY-NOISE REJECTION (dB) 10
04509-0-010
0100k 1M 10M SUPPLY-NOISE FREQUENCY (Hz)
Figure 5. Typical PSRR vs. Supply-Noise Frequency Rev. B | Page 7 of 12 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION LIMAMP Input Buffer CML Output Buffer LOSS OF SIGNAL (LOS) DETECTOR RECEIVED SIGNAL STRENGTH INDICATOR (RSSI) SQUELCH MODE APPLICATIONS INFORMATION PCB DESIGN GUIDELINES Power Supply Connections and Ground Planes PCB Layout Soldering Guidelines for Chip Scale Package OUTLINE DIMENSIONS ORDERING GUIDE NOTES
04509-0-002
0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
04509-0-020
RSSI_IN (mA)
Figure 3. RSSI Output vs. Average PIN Photodiode Current Figure 6. Eye Diagram at 3.2 Gb/s
0.014 0.012 VERTICAL SCALE: 100mV/DIV 0.010 0.008 0.006 TRIP POINT (V) L OS 0.004 0.002
04509-0-009
010 100 1k 10k 100k
04509-0-021
RTH (
Ω
)
Figure 4. LOS Trip Point vs. Threshold Adjust Resistor Figure 7. Eye Diagram at 2.488 Gb/s
70 60 50 40 30 20 SUPPLY-NOISE REJECTION (dB) 10
04509-0-010
0100k 1M 10M SUPPLY-NOISE FREQUENCY (Hz)
Figure 5. Typical PSRR vs. Supply-Noise Frequency Rev. B | Page 7 of 12 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION LIMAMP Input Buffer CML Output Buffer LOSS OF SIGNAL (LOS) DETECTOR RECEIVED SIGNAL STRENGTH INDICATOR (RSSI) SQUELCH MODE APPLICATIONS INFORMATION PCB DESIGN GUIDELINES Power Supply Connections and Ground Planes PCB Layout Soldering Guidelines for Chip Scale Package OUTLINE DIMENSIONS ORDERING GUIDE NOTES
