Product Brief PIC18FXXQ84 (Microchip) - 8
| Manufacturer | Microchip |
| Description | Microcontrollers in 28/40/44/48-pin devices for many automotive and industrial application |
| Pages / Page | 20 / 8 — PIC18FXXQ84. Pin Diagrams. Pin Diagrams Figure 2-1. 28-Pin SPDIP, SSOP, … |
| File Format / Size | PDF / 331 Kb |
| Document Language | English |
PIC18FXXQ84. Pin Diagrams. Pin Diagrams Figure 2-1. 28-Pin SPDIP, SSOP, SOIC. Figure 2-2. 28-Pin , VQFN. Note: . Product Brief
Model Line for this Datasheet
Text Version of Document
PIC18FXXQ84
Filename: 00-000028A.vsd
Pin Diagrams
Title: 28-pin DIP Last Edit: 10/3/2018 First Used: N/A Notes: Generic 28-pin dual in-line diagram
2. Pin Diagrams Figure 2-1. 28-Pin SPDIP, SSOP, SOIC
Rev. 00-000028A 10/3/2018 MCLR/VPP/RE3 1 28 RB7/ICSPDAT RA0 2 27 RB6/ICSPCLK RA1 3 26 RB5 RA2 4 25 RB4 RA3 5 24 RB3 RA4 6 23 RB2 RA5 7 22 RB1 VSS 8 21 RB0 RA7 9 20 VDD RA6 10 19 VSS RC0 11 18 RC7 RC1 12 17 RC6 RC2 13 16 RC5 RC3 14 15 RC4
Figure 2-2. 28-Pin , VQFN
P Rev. 00-000028B P T K 6/23/2017 L /V R DA C L P P C S /M /ICS /IC 1 0 3 7 6 5 4 A A E B B B B R R R R R R R 28 27 26 25 24 23 22 RA2 1 21 RB3 RA3 2 20 RB2 RA4 3 19 RB1 RA5 4 18 RB0 VSS 5 17 VDD RA7 6 16 VSS RA6 7 15 RC7 8 9 10 11 12 13 14 0 1 2 3 4 5 6 C C C C C C C R R R R R R R
Note:
It is recommended that the exposed bottom pad be connected to VSS, however it must not be the only VSS connection to the device. © 2019 Microchip Technology Inc.
Product Brief
DS40002148A-page 8 Document Outline Introduction PIC18 Q84 Family Types Features Memory Operating Characteristics Power-Saving Functionality Digital Peripherals Analog Peripherals Clocking Structure Programming/Debug Features Table of Contents 1. Packages 2. Pin Diagrams 3. Pin Allocation Tables The Microchip Website Product Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service
Filename: 00-000028A.vsd
Pin Diagrams
Title: 28-pin DIP Last Edit: 10/3/2018 First Used: N/A Notes: Generic 28-pin dual in-line diagram
2. Pin Diagrams Figure 2-1. 28-Pin SPDIP, SSOP, SOIC
Rev. 00-000028A 10/3/2018 MCLR/VPP/RE3 1 28 RB7/ICSPDAT RA0 2 27 RB6/ICSPCLK RA1 3 26 RB5 RA2 4 25 RB4 RA3 5 24 RB3 RA4 6 23 RB2 RA5 7 22 RB1 VSS 8 21 RB0 RA7 9 20 VDD RA6 10 19 VSS RC0 11 18 RC7 RC1 12 17 RC6 RC2 13 16 RC5 RC3 14 15 RC4
Figure 2-2. 28-Pin , VQFN
P Rev. 00-000028B P T K 6/23/2017 L /V R DA C L P P C S /M /ICS /IC 1 0 3 7 6 5 4 A A E B B B B R R R R R R R 28 27 26 25 24 23 22 RA2 1 21 RB3 RA3 2 20 RB2 RA4 3 19 RB1 RA5 4 18 RB0 VSS 5 17 VDD RA7 6 16 VSS RA6 7 15 RC7 8 9 10 11 12 13 14 0 1 2 3 4 5 6 C C C C C C C R R R R R R R
Note:
It is recommended that the exposed bottom pad be connected to VSS, however it must not be the only VSS connection to the device. © 2019 Microchip Technology Inc.
Product Brief
DS40002148A-page 8 Document Outline Introduction PIC18 Q84 Family Types Features Memory Operating Characteristics Power-Saving Functionality Digital Peripherals Analog Peripherals Clocking Structure Programming/Debug Features Table of Contents 1. Packages 2. Pin Diagrams 3. Pin Allocation Tables The Microchip Website Product Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service
