Datasheet LTC4071 (Analog Devices) - 8

ManufacturerAnalog Devices
DescriptionLi-Ion/Polymer Shunt Battery Charger System with Low Battery Disconnect
Pages / Page18 / 8 — OPERATION. Table 1. NTC Qualified Float Voltage. VNTC AS % OF. ADJ. …
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OPERATION. Table 1. NTC Qualified Float Voltage. VNTC AS % OF. ADJ. NTCBIAS. FLOAT(NTC) TEMPERATURE. FLOAT_EFF

OPERATION Table 1 NTC Qualified Float Voltage VNTC AS % OF ADJ NTCBIAS FLOAT(NTC) TEMPERATURE FLOAT_EFF

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link to page 10 link to page 8 LTC4071
OPERATION
In cases where the input supply may be shorted to GND
Table 1. NTC Qualified Float Voltage
when not supplying power, for example with a solar cell,
VNTC AS % OF
add a diode in series with R
ADJ ∆V NTCBIAS V
IN to prevent the input from
FLOAT(NTC) TEMPERATURE FLOAT_EFF
loading the battery. For more information, refer to the pho- GND 50mV T < 40°C VNTC > 36.5 4.000 40°C ≤ T < 50°C 29.0 < V 3.950 tovoltaic charger example in the Applications Information NTC ≤ 36.5 50°C ≤ T < 60°C 22.8 < VNTC ≤ 29.0 3.900 section. 60°C ≤ T < 70°C 17.8 < VNTC ≤ 22.8 3.850 70°C < T VNTC ≤ 17.8 3.800
Adjustable Float Voltage, V
Floating 75mV T < 40°C V 4.100
FLOAT
NTC > 36.5 40°C ≤ T < 50°C 29.0 < VNTC ≤ 36.5 4.025 A built-in 3-state decoder connected to the ADJ pin pro- 50°C ≤ T < 60°C 22.8 < VNTC ≤ 29.0 3.950 60°C ≤ T < 70°C 17.8 < V 3.875 vides three programmable float voltages: 4.0V, 4.1V, or NTC ≤ 22.8 70°C < T VNTC ≤ 17.8 3.800 4.2V. The float voltage is programmed to 4.0V when ADJ VCC 100mV T < 40°C VNTC > 36.5 4.200 is tied to GND, 4.1V when ADJ is floating (disconnected), 40°C ≤ T < 50°C 29.0 < VNTC ≤ 36.5 4.100 and 4.2V when ADJ is tied to V 50°C ≤ T < 60°C 22.8 < VNTC ≤ 29.0 4.000 CC. The state of the ADJ 60°C ≤ T < 70°C 17.8 < VNTC ≤ 22.8 3.900 pin (and NTC pins) is sampled for about 36µs about once 70°C < T VNTC ≤ 17.8 3.800 every 1.2 seconds when HBO is high, and when HBO is low the sampling rate reduces to about once every For all ADJ pin settings the lowest float voltage setting is: 3.6 seconds with the same duty cycle. If VCC falls below V 3.8V = VFLOAT_MIN = VFLOAT – 4 • ∆VFLOAT(NTC). LBD, the sampling stops. When it is being sampled, the LTC4071 applies a relatively low impedance voltage at the This occurs at NTC thermistor temperatures above 70°C, ADJ pin. This technique prevents low level board leakage or if the NTC pin is grounded. from corrupting the programmed float voltage. To conserve power in the NTCBIAS and NTC resistors, the
NTC Qualified Float Voltage, ∆V
NTCBIAS pin is sampled at a low duty cycle at the same
FLOAT(NTC)
time that the ADJ pin state is sampled. The NTC pin voltage is compared against an internal resistor divider tied to the NTCBIAS pin. This divider has
High Battery Status Output: HBO
tap points that are matched to the NTC thermistor resis- tance/temperature conversion table for a Vishay curve 2 The HBO pin pulls high when VCC rises to within VHBTH thermistor at temperatures of 40°C, 50°C, 60°C, and of the programmed float voltage, VFLOAT_EFF, including 70°C. The curve 2 thermistor is also designated by a NTC qualified float voltage adjustments assuming VCC B25/85 value of 3490. has risen above VLBC_VCC. Battery temperature conditioning adjusts the float volt- If VCC drops below the float voltage by more than VHBTH + age down to V V FLOAT_EFF when the NTC thermistor indi- HBHY the HBO pin pulls low to indicate that the battery is cates that the battery temperature is too high. For a 10k not at full charge. The input supply current to the LTC4071 curve 2 thermistor and a 10k NTCBIAS resistor, each 10°C drops to less than 550nA (typ) as the LTC4071 no longer increase in temperature above 40°C causes the float volt- shunts current to protect the battery. And the NTCBIAS age to drop by a fixed amount, ∆V sample clock slows to conserve power. FLOAT(NTC), depending on ADJ. If ADJ is at GND, the float voltage steps down For example, if the NTC thermistor requires the float voltage by 50mV for each 10°C temperature increment. If ADJ to be dropped by 100mV (ADJ = VCC and 0.29•VNTCBIAS is floating, the step size is 75mV. And if ADJ is at VCC, < VNTC < 0.36•VNTCBIAS) then the HBO rising threshold the step size is 100mV. Refer to Table 1 for the range of is detected when VCC rises past: VFLOAT_EFF programming. VFLOAT – ∆VFLOAT(NTC) – VHBTH = 4.2V – 100mV – 40mV = 3.96V. Rev. D 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts