link to page 2 link to page 15 link to page 16 link to page 16 LTC6992-1/LTC6992-2/ LTC6992-3/LTC6992-4 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 7: To conform to the Logic IC Standard, current out of a pin is may cause permanent damage to the device. Exposure to any Absolute arbitrarily given a negative value. Maximum Rating condition for extended periods may affect device Note 8: Output rise and fall times are measured between the 10% and the reliability and lifetime. 90% power supply levels with 5pF output load. These specifications are Note 2: The LTC6992C is guaranteed functional over the operating based on characterization. temperature range of –40°C to 85°C. Note 9: Jitter is the ratio of the peak-to-peak deviation of the period to the Note 3: The LTC6992C is guaranteed to meet specified performance from mean of the period. This specification is based on characterization and is 0°C to 70°C. The LTC6992C is designed, characterized and expected to not 100% tested. meet specified performance from –40°C to 85°C but it is not tested or Note 10: Long-term drift of silicon oscillators is primarily due to the QA sampled at these temperatures. The LTC6992I is guaranteed to meet movement of ions and impurities within the silicon and is tested at 30°C specified performance from –40°C to 85°C. The LTC6992H is guaranteed under otherwise nominal operating conditions. Long-term drift is specified to meet specified performance from –40°C to 125°C. The LTC6992MP is as ppm/√kHr due to the typically nonlinear nature of the drift. To calculate guaranteed to meet specified performance from –55°C to 125°C. drift for a set time period, translate that time into thousands of hours, take Note 4: Frequency accuracy is defined as the deviation from the fOUT the square root and multiply by the typical drift number. For instance, a equation, assuming RSET is used to program the frequency. year is 8.77kHr and would yield a drift of 266ppm at 90ppm/√kHr. Drift Note 5: See Operation section, Table 1 and Figure 2 for a full explanation without power applied to the device may be approximated as 1/10th of the of how the DIV pin voltage selects the value of DIVCODE. drift with power, or 9ppm/√kHr for a 90ppm/√kHr device. Note 6: Duty cycle settling time is the amount of time required for the output to settle within ±1% of the final duty cycle after a ±10% change in the setting (±80mV step in VMOD). TYPICAL PERFORMANCE CHARACTERISTICSV+ = 3.3V, RSET = 200k, and TA = 25°C, unlessotherwise noted.Frequency Error vs TemperatureFrequency Error vs TemperatureFrequency Error vs Temperature 3 3 3 GUARANTEED MAX OVER TEMPERATURE GUARANTEED MAX OVER TEMPERATURE GUARANTEED MAX OVER TEMPERATURE 2 RSET = 50k 2 RSET = 200k 2 RSET = 800k 3 PARTS 3 PARTS 3 PARTS 1 1 1 0 0 0 ERROR (%) ERROR (%) ERROR (%) –1 –1 –1 –2 –2 –2 GUARANTEED MIN OVER TEMPERATURE GUARANTEED MIN OVER TEMPERATURE GUARANTEED MIN OVER TEMPERATURE –3 –3 –3 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) 6992 G01 6992 G02 6992 G03 Rev. D 6 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts