Datasheet ES8311 (Everest Semiconductor) - 6

Everest Semiconductor Confidential ES8311
Chip Addr Write ACK Reg Addr ACK Write Data ACK CDATA bit 1 to 7 bit 1 to 8 bit 1 to 8 CCLK START STOP Figure 1a I2C Write Timing Table 2 Read Data from Register in I2C Interface Mode Chip Address R/W Register Address Start 0011 00 CE 0 ACK RAM ACK Chip Address R/W Data to be read Start 0011 00 CE 1 ACK Data NACK Stop Chip Addr Write ACK Reg Addr ACK Chip Addr Read ACK Read Data NO ACK CDATA bit 1 to 7 bit 1 to 8 bit 1 to 7 bit 1 to 8 CCLK START START STOP Figure 1b I2C Rea d Timing Revision 7.0 6 January 2020 Latest datasheet: www.everest-semi.com or info@everest-semi.com Document Outline Block Diagram Pin Out and Description typical APPLICATION CIRCUIT Clock Modes and Sampling Frequencies Micro-controller configuration Interface Digital Audio Interface ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Recommended Operating Conditions ADC Analog and Filter Characteristics and Specifications DAC Analog and Filter Characteristics and Specifications DC Characteristics Serial Audio Port Switching Specifications I2C Switching Specifications (slow speed mode/high speed mode) Package CORPORATe INFORMATION