Datasheet LTM4668A (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Quad DC/DC µModule Regulator with Configurable 1.2A Output Array |
| Pages / Page | 24 / 10 — APPLICATIONS INFORMATION. Table 2. VFB Resistor Table vs Various Output … |
| Revision | A |
| File Format / Size | PDF / 1.2 Mb |
| Document Language | English |
APPLICATIONS INFORMATION. Table 2. VFB Resistor Table vs Various Output Voltages. IN to VOUT Step-Down Ratios
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APPLICATIONS INFORMATION
The typical LTM4668A application circuit is shown in
Table 2. VFB Resistor Table vs Various Output Voltages
Figure 14. External component selection is primarily deter- VOUT(V) 0.6 1.0 1.2 1.5 1.8 2.5 3.3 5.0 mined by the input voltage, the output voltage and the RFB(k) OPEN 90.9 60.4 40.2 30.1 19.1 13.3 8.25 maximum load current. Refer to Table 8 for specific exter- nal capacitor requirements for a particular application. For parallel operation, a single resistor as determined by
V
the previous equation is used for RFB and is connected
IN to VOUT Step-Down Ratios
from a master channel’s FB pin to GND. Tie the FB pins There are restrictions in the maximum VIN and VOUT step- of the slave channels to INTVCC and tie the VOUT pins and down ratio that can be achieved for a given input volt- the RUN pins together for all channels in parallel. See the age due to the minimum on-time limits of each regulator Multi-Channel Parallel Operation section. channel. The minimum on-time limit imposes a minimum duty cycle of the converter which can be calculated as:
Input Decoupling Capacitors
D The LTM4668A module should be connected to a low MIN = TON(MIN) • fSW AC-impedance DC source. One piece of 4.7µF input where TON(MIN) is the minimum on-time, 40ns typical for ceramic capacitor is required to be placed on each side of LTM4668A. the module for RMS ripple current decoupling. Bulk input In the cases where the minimum duty cycle is surpassed, capacitor is only needed when the input source imped- pulse-skipping mode (MODE/SYNC = GND) or Burst ance is compromised by long inductive leads, traces or Mode (MODE/SYNC = INTV not enough source capacitance. The bulk capacitor can be CC) has to be implemented instead of forced-continuous mode operation in order to an electrolytic aluminum capacitor and polymer capacitor. allow the LTM4668A to decrease switching frequency and Without considering the inductor current ripple, the RMS maintain output voltage in regulation. The pin compatible current of the input capacitor can be estimated as: module LTM4668 can also be used in high VIN, low VOUT application to avoid minimum on time violation with its I I OUT(MAX) • D • (1−D) 1MHz default switching frequency. CIN(RMS) = η% The LTM4668A is able to run at 100% duty cycle opera- where η% is the estimated efficiency of the power module. tion. As the duty cycle approaches 100%, the LTM4668A enters dropout operation. During dropout, the top PMOS
Output Decoupling Capacitors
switch is turned on continuously, and all active circuitry is kept alive. With an optimized high frequency, high bandwidth design, only single piece of low ESR output ceramic capacitor is Note that additional thermal derating may be applied. See required for each regulator channel to achieve low output the Thermal Considerations and Output Current Derating voltage ripple and very good transient response. Additional section in this data sheet. output filtering may be required by the system designer, if further reduction of output ripples or dynamic transient
Output Voltage Programming
spikes is required. Table 8 shows a matrix of different out- The PWM controller has an internal 0.6V reference volt- put voltages and output capacitors to minimize the volt- age. As shown in the Block Diagram, a 60.4k 0.5% internal age droop and overshoot during a 0.3A (25%) load step feedback resistor connects each regulator channel V transient. Multiphase operation will reduce effective output OUT and FB pin together. Adding a resistor R ripple as a function of the number of phases. Application FB from FB pin to GND programs the output voltage: Note 77 discusses this noise reduction versus output rip- ple current cancel ation, but the output capacitance wil be 60.4k V + RFB more a function of stability and transient response. The OUT = 0.6V • RFB LTpowerCAD® design tool is available to download online Rev. A 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Revision History Package Photo Design Resources Related Parts
APPLICATIONS INFORMATION
The typical LTM4668A application circuit is shown in
Table 2. VFB Resistor Table vs Various Output Voltages
Figure 14. External component selection is primarily deter- VOUT(V) 0.6 1.0 1.2 1.5 1.8 2.5 3.3 5.0 mined by the input voltage, the output voltage and the RFB(k) OPEN 90.9 60.4 40.2 30.1 19.1 13.3 8.25 maximum load current. Refer to Table 8 for specific exter- nal capacitor requirements for a particular application. For parallel operation, a single resistor as determined by
V
the previous equation is used for RFB and is connected
IN to VOUT Step-Down Ratios
from a master channel’s FB pin to GND. Tie the FB pins There are restrictions in the maximum VIN and VOUT step- of the slave channels to INTVCC and tie the VOUT pins and down ratio that can be achieved for a given input volt- the RUN pins together for all channels in parallel. See the age due to the minimum on-time limits of each regulator Multi-Channel Parallel Operation section. channel. The minimum on-time limit imposes a minimum duty cycle of the converter which can be calculated as:
Input Decoupling Capacitors
D The LTM4668A module should be connected to a low MIN = TON(MIN) • fSW AC-impedance DC source. One piece of 4.7µF input where TON(MIN) is the minimum on-time, 40ns typical for ceramic capacitor is required to be placed on each side of LTM4668A. the module for RMS ripple current decoupling. Bulk input In the cases where the minimum duty cycle is surpassed, capacitor is only needed when the input source imped- pulse-skipping mode (MODE/SYNC = GND) or Burst ance is compromised by long inductive leads, traces or Mode (MODE/SYNC = INTV not enough source capacitance. The bulk capacitor can be CC) has to be implemented instead of forced-continuous mode operation in order to an electrolytic aluminum capacitor and polymer capacitor. allow the LTM4668A to decrease switching frequency and Without considering the inductor current ripple, the RMS maintain output voltage in regulation. The pin compatible current of the input capacitor can be estimated as: module LTM4668 can also be used in high VIN, low VOUT application to avoid minimum on time violation with its I I OUT(MAX) • D • (1−D) 1MHz default switching frequency. CIN(RMS) = η% The LTM4668A is able to run at 100% duty cycle opera- where η% is the estimated efficiency of the power module. tion. As the duty cycle approaches 100%, the LTM4668A enters dropout operation. During dropout, the top PMOS
Output Decoupling Capacitors
switch is turned on continuously, and all active circuitry is kept alive. With an optimized high frequency, high bandwidth design, only single piece of low ESR output ceramic capacitor is Note that additional thermal derating may be applied. See required for each regulator channel to achieve low output the Thermal Considerations and Output Current Derating voltage ripple and very good transient response. Additional section in this data sheet. output filtering may be required by the system designer, if further reduction of output ripples or dynamic transient
Output Voltage Programming
spikes is required. Table 8 shows a matrix of different out- The PWM controller has an internal 0.6V reference volt- put voltages and output capacitors to minimize the volt- age. As shown in the Block Diagram, a 60.4k 0.5% internal age droop and overshoot during a 0.3A (25%) load step feedback resistor connects each regulator channel V transient. Multiphase operation will reduce effective output OUT and FB pin together. Adding a resistor R ripple as a function of the number of phases. Application FB from FB pin to GND programs the output voltage: Note 77 discusses this noise reduction versus output rip- ple current cancel ation, but the output capacitance wil be 60.4k V + RFB more a function of stability and transient response. The OUT = 0.6V • RFB LTpowerCAD® design tool is available to download online Rev. A 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Revision History Package Photo Design Resources Related Parts
