Datasheet HMC8100LP6JE (Analog Devices)

ManufacturerAnalog Devices
DescriptionIntermediate Frequency Receiver, 800 MHz to 4000 MHz
Pages / Page27 / 1 — Intermediate Frequency Receiver,. 800 MHz to 4000 MHz. Data Sheet. …
RevisionB
File Format / SizePDF / 745 Kb
Document LanguageEnglish

Intermediate Frequency Receiver,. 800 MHz to 4000 MHz. Data Sheet. HMC8100LP6JE. FEATURES. GENERAL DESCRIPTION

Datasheet HMC8100LP6JE Analog Devices, Revision: B

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Intermediate Frequency Receiver, 800 MHz to 4000 MHz Data Sheet HMC8100LP6JE FEATURES GENERAL DESCRIPTION High linearity: supports modulations to 1024 QAM
The HMC8100LP6JE is a highly integrated intermediate
Rx IF range: 80 MHz to 200 MHz
frequency (IF) receiver chip that converts radio frequency (RF)
Rx RF range: 800 MHz to 4000 MHz
input signals ranging from 800 MHz to 4000 MHz down to a
Rx power control: 80 dB
single-ended intermediate frequency (IF) signal of 140 MHz at its
SPI programmable bandpass filters
output.
SPI controlled interface
The IF receiver chip is housed in a compact 6 mm × 6 mm
40-lead, 6 mm × 6 mm LFCSP package
LFCSP package and supports complex modulations up to
APPLICATIONS
1024 QAM. The HMC8100LP6JE device includes two variable
Point to point communications
gain amplifiers (VGAs), three power detectors, a programmable
Satellite communications
automatic gain control (AGC) block, and selected integrated
Wireless microwave backhaul systems
band-pass filters with 14 MHz, 28 MHz, 56 MHz, and 112 MHz bandwidth. The HMC8100LP6JE also supports baseband IQ interfaces after the mixer so that the chips can be used in the full outdoor units (ODU) configuration. The HMC8100LP6JE supports all standard microwave frequency bands from 6 GHz to 42 GHz.
FUNCTIONAL BLOCK DIAGRAM HMC8100 K_P _N _P K _Q _Q F_CL T RE RS SDO SDI SCL SEN LON LOP IRM IRM 40 39 38 37 36 35 34 33 32 31 DVDD 1 30 VDD SPI OTP AMP2_P 2 29 IRM_I_N AMP2_N 3 28 IRM_I_P VCC_FILTER 4 FILTER 27 VCC_IRM 14MHz FILTER2P 5 28MHz 26 VCC_VGA1_BALUN 56MHz VCC_AMP3 6 112MHz 25 VCC_VGA1 GND1 7 24 FILTER1P VCC_BB 8 AGC 23 VCC_AMP1 GND2 9 22 AMP1 VGA_EXT_CAP 10 21 GND 11 12 13 14 15 16 17 18 19 20 PACKAGE BASE UT A3 N SI UT D1 UT G FIN GND _O _O _RS R F_CAP _CAP RX PD3_I UT VCC_P PD1_O VCC_V AUX A_I G A_RF G
001
PD3_O VC_V VC_V
13867- Figure 1.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2016–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS: 800 MHz TO 1800 MHz RF FREQUENCY RANGE ELECTRICAL CHARACTERISTICS: 1800 MHz TO 2800 MHz RF FREQUENCY RANGE ELECTRICAL CHARACTERISTICS: 2800 MHz TO 4000 MHz RF FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EXTERNAL AGC CONFIGURATION INTERNAL AGC CONFIGURATION THEORY OF OPERATION REGISTER ARRAY ASSIGNMENTS AND SERIAL INTERFACE Read Example REGISTER DESCRIPTIONS REGISTER ARRAY ASSIGNMENTS Enable Bits Image Reject and Band-Pass Filter Bits Band-Pass Filter Bits: OTP and SPI AGC AGC: IF Gain Limit Bits Band-Pass Filter Bits: Calibration and 8-Bit Word Frequency AGC: Blocker Power Detector Bits Phase I Bits Phase Q Bits APPLICATIONS INFORMATION SCHEMATIC/TYPICAL APPLICATION CIRCUIT EVALUATION PRINTED CIRCUIT BOARD (PCB) OUTLINE DIMENSIONS ORDERING GUIDE