link to page 1 link to page 1 link to page 1 link to page 1 link to page 2 link to page 3 link to page 3 link to page 4 link to page 4 link to page 4 link to page 5 link to page 6 link to page 8 link to page 8 link to page 8 link to page 8 link to page 8 link to page 9 link to page 9 link to page 10 link to page 11 link to page 12 link to page 12 ADCMP609Data SheetTABLE OF CONTENTS Features .. 1 Applications Information ...8 Applications ... 1 Power/Ground Layout and Bypassing ..8 Functional Block Diagram .. 1 TTL-/CMOS-Compatible Output Stage ..8 General Description ... 1 Optimizing Performance ..8 Revision History ... 2 Comparator Propagation Delay Dispersion ..8 Specifications ... 3 Comparator Hysteresis ...9 Electrical Characteristics ... 3 Crossover Bias Point ...9 Absolute Maximum Ratings .. 4 Minimum Input Slew Rate Requirement .. 10 Thermal Resistance .. 4 Typical Applications Circuits .. 11 ESD Caution .. 4 Outline Dimensions ... 12 Pin Configuration and Function Descriptions ... 5 Ordering Guide .. 12 Typical Performance Characteristics ... 6 REVISION HISTORY 11/14—Rev. B to Rev. C Change to Figure 9 and Figure 10 .. 7 6/14—Rev. A to Rev. B Added Storage Temperature Range of −65°C to +150°C .. 4 Updated Outline Dimensions ... 12 8/08—Rev. 0 to Rev. A Changes to Table 4 .. 5 Changes to Ordering Guide .. 12 7/07—Revision 0: Initial Version Rev. C | Page 2 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATIONS CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE