Datasheet ADCMP551, ADCMP552, ADCMP553 (Analog Devices) - 7

Data Sheet ADCMP551/ADCMP552/ADCMP553 Pin No. ADCMP551 ADCMP552 ADCMP553 Mnemonic Description
13 16 LEB One of Two Complementary Inputs for Channel B Latch Enable. In compare mode (logic high), the output tracks changes at the input of the comparator. In latch mode (logic low), the output reflects the input state just prior to the comparator being placed into latch mode. LEB must be driven in conjunction with LEB. 15 18 QB One of Two Complementary Outputs for Channel B. QB is logic low if the analog voltage at the noninverting input is greater than the analog voltage at the inverting input (provided the comparator is in the compare mode). See the description of Pin LEB for more information. 16 19 QB One of Two Complementary Outputs for Channel B. QB is logic high if the analog voltage at the noninverting input is greater than the analog voltage at the inverting input (provided the comparator is in the compare mode). See the description of Pin LEB for more information. 7 VCC Positive Supply Terminal. Rev. B | Page 7 of 15 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TIMING INFORMATION APPLICATIONS INFORMATION CLOCK TIMING RECOVERY OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE