Datasheet AD8469 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | Fast, Rail-to-Rail, Low Power, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| Pages / Page | 12 / 5 — Data Sheet. AD8469. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. VCC 1. … |
| File Format / Size | PDF / 264 Kb |
| Document Language | English |
Data Sheet. AD8469. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. VCC 1. VP 2. TOP VIEW. VN 3. (Not to Scale). VEE. SDN 4. HYS
Model Line for this Datasheet
Text Version of Document
Data Sheet AD8469 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VCC 1 8 Q AD8469 VP 2 7 Q TOP VIEW VN 3 (Not to Scale) 6 VEE
002
SDN 4 5 HYS
10490- Figure 2. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 VCC Positive Supply Voltage. 2 VP Noninverting Analog Input. 3 VN Inverting Analog Input. 4 SDN Shutdown. Drive this pin low to shut down the device. 5 HYS Hysteresis Control. Bias this pin with a resistor or current source for hysteresis. 6 VEE Negative Supply Voltage. 7 Q Noninverting Output. In compare mode, Q is at logic high if the analog voltage at the noninverting input (VP) is greater than the analog voltage at the inverting input (VN). 8 Q Inverting Output. In compare mode, Q is at logic low if the analog voltage at the noninverting input (VP) is greater than the analog voltage at the inverting input (VN). Rev. 0 | Page 5 of 12 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Applications Information Power/Ground Layout and Bypassing TTL-/CMOS-Compatible Output Stage Optimizing Performance Comparator Propagation Delay Dispersion Comparator Hysteresis Crossover Bias Point Minimum Input Slew Rate Requirement Typical Applications Circuits Outline Dimensions Ordering Guide Automotive Products
002
SDN 4 5 HYS
10490- Figure 2. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 VCC Positive Supply Voltage. 2 VP Noninverting Analog Input. 3 VN Inverting Analog Input. 4 SDN Shutdown. Drive this pin low to shut down the device. 5 HYS Hysteresis Control. Bias this pin with a resistor or current source for hysteresis. 6 VEE Negative Supply Voltage. 7 Q Noninverting Output. In compare mode, Q is at logic high if the analog voltage at the noninverting input (VP) is greater than the analog voltage at the inverting input (VN). 8 Q Inverting Output. In compare mode, Q is at logic low if the analog voltage at the noninverting input (VP) is greater than the analog voltage at the inverting input (VN). Rev. 0 | Page 5 of 12 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Applications Information Power/Ground Layout and Bypassing TTL-/CMOS-Compatible Output Stage Optimizing Performance Comparator Propagation Delay Dispersion Comparator Hysteresis Crossover Bias Point Minimum Input Slew Rate Requirement Typical Applications Circuits Outline Dimensions Ordering Guide Automotive Products
