Datasheet EFM8LB1 (Silicon Labs) - 8
| Manufacturer | Silicon Labs |
| Description | EFM8 Laser Bee Family |
| Pages / Page | 77 / 8 — 3. System Overview. 3.1 Introduction. CIP-51 8051 Controller. Port I/O … |
| File Format / Size | PDF / 1.2 Mb |
| Document Language | English |
3. System Overview. 3.1 Introduction. CIP-51 8051 Controller. Port I/O Configuration. Debug /. Core. C2D Programming
Model Line for this Datasheet
- EFM8LB10F16E-C-QFN24 EFM8LB10F16E-C-QFN32 EFM8LB10F16E-C-QFP32 EFM8LB10F16E-C-QSOP24 EFM8LB10F16ES0-C-QFN24 EFM8LB10F16ES0-C-QFN32 EFM8LB10F16ES1-C-QFN24 EFM8LB10F16ES1-C-QFN32 EFM8LB11F16E-C-QFN24 EFM8LB11F16E-C-QFN32 EFM8LB11F16E-C-QFP32 EFM8LB11F16E-C-QSOP24 EFM8LB11F16ES0-C-QFN24 EFM8LB11F16ES0-C-QFN32 EFM8LB11F16ES1-C-QFN24 EFM8LB11F16ES1-C-QFN32 EFM8LB11F32E-C-QFN24 EFM8LB11F32E-C-QFN32 EFM8LB11F32E-C-QFP32 EFM8LB11F32E-C-QSOP24 EFM8LB11F32ES0-C-QFN24 EFM8LB11F32ES0-C-QFN32 EFM8LB11F32ES1-C-QFN24 EFM8LB11F32ES1-C-QFN32 EFM8LB12F32E-C-QFN24 EFM8LB12F32E-C-QFN32 EFM8LB12F32E-C-QFP32 EFM8LB12F32E-C-QSOP24 EFM8LB12F32ES0-C-QFN24 EFM8LB12F32ES0-C-QFN32 EFM8LB12F32ES1-C-QFN24 EFM8LB12F32ES1-C-QFN32 EFM8LB12F64E-C-QFN24 EFM8LB12F64E-C-QFN32 EFM8LB12F64E-C-QFP32 EFM8LB12F64E-C-QSOP24 EFM8LB12F64ES0-C-QFN24 EFM8LB12F64ES0-C-QFN32 EFM8LB12F64ES1-C-QFN24 EFM8LB12F64ES1-C-QFN32
Text Version of Document
EFM8LB1 Data Sheet System Overview
3. System Overview 3.1 Introduction CIP-51 8051 Controller Port I/O Configuration Debug / Core C2D Programming Digital Peripherals Hardware UART0 64 KB ISP Flash
VIO C2CK/RSTb
Program Memory UART1 Reset Timers 0, Power-On 1, 2, 3, 4, 5 Reset 256 Byte SRAM Port 0 Priority 6-ch PCA
P0.n
Drivers Crossbar Supply I2C Slave 4096 Byte XRAM Decoder Monitor I2C / SMBus Port 1
P1.n
Drivers
VDD
SPI Power Net CRC Independent SYSCLK Voltage Watchdog Config. Crossbar Port 2 Regulator Timer
P2.n
SFR Logic Control Drivers Bus Units (4)
GND
System Clock Configuration Analog Peripherals Port 3
P3.n
Drivers Internal Low Freq. 4 12-bit Reference Oscillator DACs CMOS Clock VDD VREF EXTCLK Input VDD External EXTOSC RC Oscillator 14/12/10- bit ADC AMUX Temp 72 MHz 2% Sensor Oscillator 24.5 MHz 2%
+
Oscillator
-+-
2 Comparators Figure 3.1. Detailed EFM8LB1 Block Diagram
This section describes the EFM8LB1 family at a high level. For more information on the device packages and pinout, electrical specifications, and typical connection diagrams, see the EFM8LB1 Data Sheet. For more information on each module including register definitions, see the EFM8LB1 Reference Manual. For more infor- mation on any errata, see the EFM8LB1 Errata.
silabs.com
| Building a more connected world. Rev. 1.3 | 8 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Power 3.3 I/O 3.4 Clocking 3.5 Counters/Timers and PWM 3.6 Communications and Other Digital Peripherals 3.7 Analog 3.8 Reset Sources 3.9 Debugging 3.10 Bootloader 4. Electrical Specifications 4.1 Electrical Characteristics 4.1.1 Recommended Operating Conditions 4.1.2 Power Consumption 4.1.3 Reset and Supply Monitor 4.1.4 Flash Memory 4.1.5 Power Management Timing 4.1.6 Internal Oscillators 4.1.7 External Clock Input 4.1.8 External Oscillator 4.1.9 ADC 4.1.10 Voltage Reference 4.1.11 Temperature Sensor 4.1.12 1.8 V Internal LDO Voltage Regulator 4.1.13 DACs 4.1.14 Comparators 4.1.15 Configurable Logic 4.1.16 Port I/O 4.1.17 SMBus 4.2 Thermal Conditions 4.3 Absolute Maximum Ratings 5. Typical Connection Diagrams 5.1 Power 5.2 Debug 5.3 Other Connections 6. Pin Definitions 6.1 EFM8LB1x-QFN32 Pin Definitions 6.2 EFM8LB1x-QFP32 Pin Definitions 6.3 EFM8LB1x-QFN24 Pin Definitions 6.4 EFM8LB1x-QSOP24 Pin Definitions 7. QFN32 Package Specifications 7.1 Package Dimensions 7.2 PCB Land Pattern 7.3 Package Marking 8. QFP32 Package Specifications 8.1 Package Dimensions 8.2 PCB Land Pattern 8.3 Package Marking 9. QFN24 Package Specifications 9.1 Package Dimensions 9.2 PCB Land Pattern 9.3 Package Marking 10. QSOP24 Package Specifications 10.1 Package Dimensions 10.2 PCB Land Pattern 10.3 Package Marking 11. Revision History
3. System Overview 3.1 Introduction CIP-51 8051 Controller Port I/O Configuration Debug / Core C2D Programming Digital Peripherals Hardware UART0 64 KB ISP Flash
VIO C2CK/RSTb
Program Memory UART1 Reset Timers 0, Power-On 1, 2, 3, 4, 5 Reset 256 Byte SRAM Port 0 Priority 6-ch PCA
P0.n
Drivers Crossbar Supply I2C Slave 4096 Byte XRAM Decoder Monitor I2C / SMBus Port 1
P1.n
Drivers
VDD
SPI Power Net CRC Independent SYSCLK Voltage Watchdog Config. Crossbar Port 2 Regulator Timer
P2.n
SFR Logic Control Drivers Bus Units (4)
GND
System Clock Configuration Analog Peripherals Port 3
P3.n
Drivers Internal Low Freq. 4 12-bit Reference Oscillator DACs CMOS Clock VDD VREF EXTCLK Input VDD External EXTOSC RC Oscillator 14/12/10- bit ADC AMUX Temp 72 MHz 2% Sensor Oscillator 24.5 MHz 2%
+
Oscillator
-+-
2 Comparators Figure 3.1. Detailed EFM8LB1 Block Diagram
This section describes the EFM8LB1 family at a high level. For more information on the device packages and pinout, electrical specifications, and typical connection diagrams, see the EFM8LB1 Data Sheet. For more information on each module including register definitions, see the EFM8LB1 Reference Manual. For more infor- mation on any errata, see the EFM8LB1 Errata.
silabs.com
| Building a more connected world. Rev. 1.3 | 8 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Power 3.3 I/O 3.4 Clocking 3.5 Counters/Timers and PWM 3.6 Communications and Other Digital Peripherals 3.7 Analog 3.8 Reset Sources 3.9 Debugging 3.10 Bootloader 4. Electrical Specifications 4.1 Electrical Characteristics 4.1.1 Recommended Operating Conditions 4.1.2 Power Consumption 4.1.3 Reset and Supply Monitor 4.1.4 Flash Memory 4.1.5 Power Management Timing 4.1.6 Internal Oscillators 4.1.7 External Clock Input 4.1.8 External Oscillator 4.1.9 ADC 4.1.10 Voltage Reference 4.1.11 Temperature Sensor 4.1.12 1.8 V Internal LDO Voltage Regulator 4.1.13 DACs 4.1.14 Comparators 4.1.15 Configurable Logic 4.1.16 Port I/O 4.1.17 SMBus 4.2 Thermal Conditions 4.3 Absolute Maximum Ratings 5. Typical Connection Diagrams 5.1 Power 5.2 Debug 5.3 Other Connections 6. Pin Definitions 6.1 EFM8LB1x-QFN32 Pin Definitions 6.2 EFM8LB1x-QFP32 Pin Definitions 6.3 EFM8LB1x-QFN24 Pin Definitions 6.4 EFM8LB1x-QSOP24 Pin Definitions 7. QFN32 Package Specifications 7.1 Package Dimensions 7.2 PCB Land Pattern 7.3 Package Marking 8. QFP32 Package Specifications 8.1 Package Dimensions 8.2 PCB Land Pattern 8.3 Package Marking 9. QFN24 Package Specifications 9.1 Package Dimensions 9.2 PCB Land Pattern 9.3 Package Marking 10. QSOP24 Package Specifications 10.1 Package Dimensions 10.2 PCB Land Pattern 10.3 Package Marking 11. Revision History
