Datasheet M29W040B (STMicroelectronics) - 3

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M29W040B Table 2. Absolute Maximum Ratings (1) Symbol Parameter Value Unit
Ambient Operating Temperature (Temperature Range Option 1) 0 to 70 °C TA Ambient Operating Temperature (Temperature Range Option 6) –40 to 85 °C TBIAS Temperature Under Bias –50 to 125 °C TSTG Storage Temperature –65 to 150 °C V (2) IO Input or Output Voltage –0.6 to 4 V VCC Supply Voltage –0.6 to 4 V VID Identification Voltage –0.6 to 13.5 V Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi- tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual- ity documents. 2. Minimum Voltage may undershoot to –2V during transition and for less than 20ns during transitions.
Table 3. Uniform Block Addresses, M29W040B Chip Enable (E).
The Chip Enable, E, activates the memory, allowing Bus Read and Bus Write op-
Size # Address Range
erations to be performed. When Chip Enable is
(Kbytes)
High, VIH, all other pins are ignored. 7 64 70000h-7FFFFh
Output Enable (G).
The Output Enable, G, con- 6 64 60000h-6FFFFh trols the Bus Read operation of the memory. 5 64 50000h-5FFFFh
Write Enable (W).
The Write Enable, W, controls 4 64 40000h-4FFFFh the Bus Write operation of the memory’s Com- mand Interface. 3 64 30000h-3FFFFh
V
2 64 20000h-2FFFFh
CC Supply Voltage.
The VCC Supply Voltage supplies the power for all operations (Read, Pro- 1 64 10000h-1FFFFh gram, Erase etc.). 0 64 00000h-0FFFFh The Command Interface is disabled when the VCC Supply Voltage is less than the Lockout Voltage, V
SIGNAL DESCRIPTIONS
LKO. This prevents Bus Write operations from ac- cidentally damaging the data during power-up, See Figure 1, Logic Diagram, and Table 1, Signal power-down and power surges. If the Program/ Names, for a brief overview of the signals connect- Erase Controller is programming or erasing during ed to this device. this time then the operation aborts and the memo-
Address Inputs (A0-A18).
The Address Inputs ry contents being altered will be invalid. select the cells in the memory array to access dur- A 0.1µF capacitor should be connected between ing Bus Read operations. During Bus Write opera- the VCC Supply Voltage pin and the VSS Ground tions they control the commands sent to the pin to decouple the current surges from the power Command Interface of the internal state machine. supply. The PCB track widths must be sufficient to
Data Inputs/Outputs (DQ0-DQ7).
The Data In- carry the currents required during program and puts/Outputs output the data stored at the selected erase operations, ICC3. address during a Bus Read operation. During Bus
VSS Ground.
The VSS Ground is the reference for Write operations they represent the commands all voltage measurements. sent to the Command Interface of the internal state machine. 3/20 Document Outline Table 1. Signal Names Table 2. Absolute Maximum Ratings (1) Table 3. Uniform Block Addresses, M29W040B Table 4. Bus Operations Table 5. Commands Read/Reset. Auto Select. Program, Unlock Bypass Program, Chip Erase, Block Erase. Unlock Bypass. Unlock Bypass Reset. Erase Suspend. Erase Resume. Table 6. Program, Erase Times and Program, Erase Endurance Cycles (TA = 0 to 70˚C or –40 to 85˚C) Table 7. Status Register Bits Table 8. AC Measurement Conditions Table 9. Capacitance (TA = 25 ˚C, f = 1 MHz) Table 10. DC Characteristics (TA = 0 to 70˚C or –40 to 85˚C) Table 11. Read AC Characteristics (TA = 0 to 70˚C or –40 to 85˚C) Table 12. Write AC Characteristics, Write Enable Controlled (TA = 0 to 70˚C or –40 to 85˚C) Table 13. Write AC Characteristics, Chip Enable Controlled (TA = 0 to 70˚C or –40 to 85˚C) Table 14. Ordering Information Scheme Table 15. PLCC32 – 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data Table 16. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 20mm, Package Mechanical Data Table 17. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 14mm, Package Mechanical Data Table 18. Revision History SUMMARY DESCRIPTION SIGNAL DESCRIPTIONS Address Inputs (A0-A18). Data Inputs/Outputs (DQ0-DQ7). Chip Enable (E). Output Enable (G). Write Enable (W). VCC Supply Voltage. VSS Ground. BUS OPERATIONS Bus Read. Bus Write. Output Disable. Standby. Automatic Standby. Special Bus Operations Electronic Signature. Block Protection and Blocks Unprotection. COMMAND INTERFACE Read/Reset Command. Auto Select Command. Program Command. Unlock Bypass Command. Unlock Bypass Program Command. Unlock Bypass Reset Command. Chip Erase Command. Block Erase Command. Erase Suspend Command. Erase Resume Command. STATUS REGISTER Data Polling Bit (DQ7). Toggle Bit (DQ6). Error Bit (DQ5). Erase Timer Bit (DQ3). Alternative Toggle Bit (DQ2). Figure 1. Logic Diagram Figure 2. PLCC Connections Figure 3. TSOP Connections Figure 4. Data Polling Flowchart Figure 5. Data Toggle Flowchart Figure 6. AC Testing Input Output Waveform Figure 7. AC Testing Load Circuit Figure 8. Read Mode AC Waveforms Figure 9. Write AC Waveforms, Write Enable Controlled Figure 10. Write AC Waveforms, Chip Enable Controlled Figure 11. PLCC32 – 32 lead Plastic Leaded Chip Carrier, Package Outline Figure 12. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 20mm, Package Outline Figure 13. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 14mm, Package Outline