Datasheet LTC4162-F (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 35V/3.2A Multi-Cell LiFePO4 Step-Down Battery Charger with PowerPath and I2C Telemetry |
| Pages / Page | 52 / 10 — TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. … |
| Revision | A |
| File Format / Size | PDF / 1.6 Mb |
| Document Language | English |
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. Histogram of iin. Readings. Histogram of vin
Model Line for this Datasheet
- LTC4162EUFD-FAD#PBF LTC4162EUFD-FAD#TRPBF LTC4162EUFD-FADM#PBF LTC4162EUFD-FADM#TRPBF LTC4162EUFD-FFS#PBF LTC4162EUFD-FFS#TRPBF LTC4162EUFD-FFSM#PBF LTC4162EUFD-FFSM#TRPBF LTC4162EUFD-FST#PBF LTC4162EUFD-FST#TRPBF LTC4162EUFD-FSTM#PBF LTC4162EUFD-FSTM#TRPBF LTC4162IUFD-FAD#PBF LTC4162IUFD-FAD#TRPBF LTC4162IUFD-FADM#PBF LTC4162IUFD-FADM#TRPBF LTC4162IUFD-FFS#PBF LTC4162IUFD-FFS#TRPBF LTC4162IUFD-FFSM#PBF LTC4162IUFD-FFSM#TRPBF LTC4162IUFD-FST#PBF LTC4162IUFD-FST#TRPBF LTC4162IUFD-FSTM#PBF LTC4162IUFD-FSTM#TRPBF
Text Version of Document
link to page 46 link to page 45 LTC4162-F
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. Histogram of iin Readings Histogram of vin Readings
4000 10000 σ = 1.62mA σ = 3.57mV 3000 7500 2000 5000 FREQUENCY FREQUENCY 1000 2500 0 0 1.035 1.040 1.045 1.050 1.055 1.060 12.00 12.01 12.02 12.03 12.04 INPUT CURRENT (A) INPUT VOLTAGE (V) 4162F G24 4162F G25
PIN FUNCTIONS BOOST (Pin 1):
Gate-Drive bias for the high side switch in
VIN (Pin 7):
Supply voltage detection and INFET charge the switching regulator. This pin provides a pumped bias pump supply for the INFET/BATFET PowerPath. When voltage relative to SW. The voltage on this pin is charged voltage at VIN is detected as being high enough to charge a up through an internal diode from INTVCC. A 22nF multi- battery, the INFET charge-pump is activated and the BATFET layer ceramic capacitor is required from SW to BOOST. charge-pump is deactivated thereby powering VOUTA from
INTV
the input supply through an external NMOS transistor and
CC (Pin 2):
Bypass pin for the internal 5V regulator. This regulator provides power to the internal analog cir- also starting a charge cycle. A 0.1µF multilayer ceramic cuitry. A 4.7µF multilayer ceramic capacitor is required capacitor is required from VIN to GND. from INTVCC to GND.
VCC2P5 (Pin 8):
Bypass pin for the internal 2.5V regula-
V
tor. This regulator provides power to the internal logic
OUTA (Pin 3):
Analog system power pin. VOUTA powers the majority of circuits on the LTC4162. A 0.1µF multilayer circuitry. A 1µF multilayer ceramic capacitor is required ceramic capacitor is required from V from VCC2P5 to GND. OUTA to GND.
CLN (Pin 4):
Connection point for the negative terminal
NTCBIAS (Pin 9):
NTC thermistor bias output. Connect a of the sense resistor that measures and regulates input low temperature coefficient bias resistor between NTCBIAS current by limiting charge current. and NTC, and a thermistor between NTC and GND. The bias resistor should be equal in value to the nominal value
CLP (Pin 5):
Connection point for the positive terminal of the thermistor. The LTC4162 applies 1.2V to this pin of the sense resistor that measures and regulates input during NTC measurement and expects a thermistor β current by limiting charge current. value of 3490K. Higher β value thermistors can be used
INFET (Pin 6):
Gate control output pin for an input reverse with simple circuit modifications. blocking external N-channel MOSFET between VIN and VOUT. Rev A 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram ESD Diagram Timing Diagram Operation Applications Information Register Descriptions Typical Applications Package Description Revision History Typical Application Related Parts
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. Histogram of iin Readings Histogram of vin Readings
4000 10000 σ = 1.62mA σ = 3.57mV 3000 7500 2000 5000 FREQUENCY FREQUENCY 1000 2500 0 0 1.035 1.040 1.045 1.050 1.055 1.060 12.00 12.01 12.02 12.03 12.04 INPUT CURRENT (A) INPUT VOLTAGE (V) 4162F G24 4162F G25
PIN FUNCTIONS BOOST (Pin 1):
Gate-Drive bias for the high side switch in
VIN (Pin 7):
Supply voltage detection and INFET charge the switching regulator. This pin provides a pumped bias pump supply for the INFET/BATFET PowerPath. When voltage relative to SW. The voltage on this pin is charged voltage at VIN is detected as being high enough to charge a up through an internal diode from INTVCC. A 22nF multi- battery, the INFET charge-pump is activated and the BATFET layer ceramic capacitor is required from SW to BOOST. charge-pump is deactivated thereby powering VOUTA from
INTV
the input supply through an external NMOS transistor and
CC (Pin 2):
Bypass pin for the internal 5V regulator. This regulator provides power to the internal analog cir- also starting a charge cycle. A 0.1µF multilayer ceramic cuitry. A 4.7µF multilayer ceramic capacitor is required capacitor is required from VIN to GND. from INTVCC to GND.
VCC2P5 (Pin 8):
Bypass pin for the internal 2.5V regula-
V
tor. This regulator provides power to the internal logic
OUTA (Pin 3):
Analog system power pin. VOUTA powers the majority of circuits on the LTC4162. A 0.1µF multilayer circuitry. A 1µF multilayer ceramic capacitor is required ceramic capacitor is required from V from VCC2P5 to GND. OUTA to GND.
CLN (Pin 4):
Connection point for the negative terminal
NTCBIAS (Pin 9):
NTC thermistor bias output. Connect a of the sense resistor that measures and regulates input low temperature coefficient bias resistor between NTCBIAS current by limiting charge current. and NTC, and a thermistor between NTC and GND. The bias resistor should be equal in value to the nominal value
CLP (Pin 5):
Connection point for the positive terminal of the thermistor. The LTC4162 applies 1.2V to this pin of the sense resistor that measures and regulates input during NTC measurement and expects a thermistor β current by limiting charge current. value of 3490K. Higher β value thermistors can be used
INFET (Pin 6):
Gate control output pin for an input reverse with simple circuit modifications. blocking external N-channel MOSFET between VIN and VOUT. Rev A 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram ESD Diagram Timing Diagram Operation Applications Information Register Descriptions Typical Applications Package Description Revision History Typical Application Related Parts
