Datasheet LTC1960 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Dual Battery Charger/ Selector with SPI Interface |
| Pages / Page | 28 / 10 — BLOCK DIAGRAM (LTC1960CG Pin Numbers Shown) |
| Revision | C |
| File Format / Size | PDF / 547 Kb |
| Document Language | English |
BLOCK DIAGRAM (LTC1960CG Pin Numbers Shown)
Model Line for this Datasheet
Text Version of Document
LTC1960
BLOCK DIAGRAM (LTC1960CG Pin Numbers Shown)
GB1I GB1O GB2I GB2O GDCI GDCO 9 8 11 10 7 6 100mV 5 SCP + CHARGE SWB1 SWB2 SWDC SHORT CIRCUIT 100Ω DCIN – PUMP DRIVER DRIVER DRIVER 4 SCN + – 17 DCDIV ON AC_PRESENT GCH1 34 + – SCH1 33 + 12 LOPWR SELECTOR –ON CONTROLLER – GCH2 35 1.19V + CSN SCH2 36 21 MOSI BAT1 3 CHGMON SPI 20 MISO INTERFACE CHARGE BAT2 2 19 SCK 400k 11 18 SSB VPLUS 1 SCN 11-BIT ∆Σ 10-BIT ∆Σ 15 ISET VOLTAGE DAC CURRENT DAC VCC 28 VCC CSP-CSN GND REGULATOR 16 0.86V – 0V 3kΩ DCIN 29 + VSET 13 Ω – gm = 1.4m 3k – OSCILLATOR EA 23 CSP + CA1 LOW DROP 0.8V + 3k BGATE DETECT T 22 CSN ON Ω gm = 1.4m – BOOST 31 S CA2 + 0.8V TGATE Q 32 R BUFFERED ITH SW PWM ÷15 30 LOGIC + –+ V CHARGE ICMP CC – BGATE 27 – I PGND REV 40mV 26 + Ω gm = 0.4m – DCIN + 100mV – CL1 + 0.75V CLP 24 CHGMON CLAMP 25 14 1960 BD COMP1 ITH Rev. C 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Test Circuit Timing Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts
BLOCK DIAGRAM (LTC1960CG Pin Numbers Shown)
GB1I GB1O GB2I GB2O GDCI GDCO 9 8 11 10 7 6 100mV 5 SCP + CHARGE SWB1 SWB2 SWDC SHORT CIRCUIT 100Ω DCIN – PUMP DRIVER DRIVER DRIVER 4 SCN + – 17 DCDIV ON AC_PRESENT GCH1 34 + – SCH1 33 + 12 LOPWR SELECTOR –ON CONTROLLER – GCH2 35 1.19V + CSN SCH2 36 21 MOSI BAT1 3 CHGMON SPI 20 MISO INTERFACE CHARGE BAT2 2 19 SCK 400k 11 18 SSB VPLUS 1 SCN 11-BIT ∆Σ 10-BIT ∆Σ 15 ISET VOLTAGE DAC CURRENT DAC VCC 28 VCC CSP-CSN GND REGULATOR 16 0.86V – 0V 3kΩ DCIN 29 + VSET 13 Ω – gm = 1.4m 3k – OSCILLATOR EA 23 CSP + CA1 LOW DROP 0.8V + 3k BGATE DETECT T 22 CSN ON Ω gm = 1.4m – BOOST 31 S CA2 + 0.8V TGATE Q 32 R BUFFERED ITH SW PWM ÷15 30 LOGIC + –+ V CHARGE ICMP CC – BGATE 27 – I PGND REV 40mV 26 + Ω gm = 0.4m – DCIN + 100mV – CL1 + 0.75V CLP 24 CHGMON CLAMP 25 14 1960 BD COMP1 ITH Rev. C 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Test Circuit Timing Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts
