Datasheet HT68F2420 (Holtek) - 6

HT68F2420 HT68F2420 High Precision HIRC Flash MCU High Precision HIRC Flash MCU Block Diagram
RAM Port A ROM PA0~PA7 32 × 8 Driver 1K × 13 I/O Reset Port B LVR PB0~PB7 Circuit Driver Timer out Watchdog Stack 9-bit Timer VDD VDD Timer 2-level VSS HT8 MCU Core V Carrier Generator SS SYSCLK Bus (9-bit for High period & 9-bit for Low period) Carrier out VSS1 VSS1 Digital Peripherals Time LIRC Base 32kHz M UX High driving HIRC 4MHz Current High Precision REMDRV Clock System Analog Peripherals
Pin Assignment
VSS/VSS1 1 8 VDD PA1 2 7 REM/REMDRV PA2/ICPCK/OCDSCK 3 6 PB5 PA0/ICPDA/OCDSDA 4 5 PB2
HT68F2420/HT68V2420 8 SOP-A
VDD 1 16 REM/REMDRV VSS 2 15 VSS1 PA0/ICPDA/OCDSDA 3 14 PB7 PA2/ICPCK/OCDSCK 4 13 PB6 PA1 5 12 PB5 PA3 6 11 PB4 PA4 7 10 PB3 PA5 8 9 PB2
HT68F2420/HT68V2420 16 NSOP-A
VSS 1 20 VDD PA0/ICPDA/OCDSDA 2 19 REM/REMDRV PA2/ICPCK/OCDSCK 3 18 VSS1 PA1 4 17 PB7 PA3 5 16 PB6 PA4 6 15 PB5 PA5 7 14 PB4 PA6 8 13 PB3 PA7 9 12 PB2 PB0 10 11 PB1
HT68F2420/HT68V2420 20 NSOP/SSOP-A
Note: 1. For less pin-count package types there will be unbonded pins which should be properly configured to avoid unwanted current consumption resulting from floating input conditions. Refer to the “Standby Current Considerations” and “Input/Output Ports” sections. 2. Pin functions OCDSCK and OCDSDA which are pin-shared with PA2 and PA0 are only available in the OCDS EV device HT68V2420. Rev. 1.00 6 October 08, 2020 Rev. 1.00 7 October 08, 2020 Document Outline Features CPU Features Peripheral Features General Description Block Diagram Pin Assignment Pin Description Absolute Maximum Ratings D.C. Characteristics Operating Voltage Characteristics Operating Current Characteristics Standby Current Characteristics A.C. Characteristics Internal Oscillator Characteristics System Start Up Time Characteristics Input/Output Characteristics REM/REMDRV Pin Characteristics LVR Electrical Characteristics Power on Reset Characteristics System Architecture Clocking and Pipelining Program Counter Stack Arithmetic and Logic Unit – ALU Flash Program Memory Structure Special Vectors Look-up Table Table Program Example In Circuit Programming – ICP On-Chip Debug Support – OCDS Data Memory Structure General Purpose Data Memory Special Purpose Data Memory Special Function Register Description Indirect Addressing Registers – IAR0 Memory Pointers – MP0 Accumulator – ACC Program Counter Low Register – PCL Look-up Table Registers – TBLP, TBLH Status Register – STATUS Oscillators Oscillator Overview System Clock Configurations Internal RC Oscillator – HIRC Internal 32kHz Oscillator – LIRC Operating Modes and System Clocks System Clocks System Operation Modes Control Register Operating Mode Switching Standby Current Considerations Wake-up Watchdog Timer Watchdog Timer Clock Source Watchdog Timer Control Register Watchdog Timer Operation Reset and Initialisation Reset Functions Reset Initial Conditions Input/Output Ports Pull-high Resistors I/O Pin Wake-up I/O Port Control Registers I/O Pin Structures Programming Considerations 9-bit Timer with Carrier Output Timer and Carrier Output Conctrol Register Timer Operation Carrier Output Carrier Output Pins Interrupts Interrupt Register Interrupt Operation Time Base Interrupt Interrupt Wake-up Function Programming Considerations Application Circuits Instruction Set Introduction Instruction Timing Moving and Transferring Data Arithmetic Operations Logical and Rotate Operation Branches and Control Transfer Bit Operations Table Read Operations Other Operations Instruction Set Summary Table Conventions Instruction Definition Package Information 8-pin SOP (150mil) Outline Dimensions 16-pin NSOP (150mil) Outline Dimensions 20-pin NSOP (150mil) Outline Dimensions 20-pin SSOP (150mil) Outline Dimensions