Datasheet 1ED34x1Mc12M (1ED-X3 Analog) (Infineon) - 7

ManufacturerInfineon
DescriptionEiceDRIVER/ 1ED34x1Mc12M Enhanced. Single-channel isolated gate driver IC with adjustable DESAT and soft-off
Pages / Page45 / 7 — EiceDRIVER™ 1ED34x1Mc12M Enhanced. Datasheet. 3 Pin configuration and …
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EiceDRIVER™ 1ED34x1Mc12M Enhanced. Datasheet. 3 Pin configuration and functionality. Pin configuration and functionality

EiceDRIVER™ 1ED34x1Mc12M Enhanced Datasheet 3 Pin configuration and functionality Pin configuration and functionality

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EiceDRIVER™ 1ED34x1Mc12M Enhanced Datasheet 3 Pin configuration and functionality 3 Pin configuration and functionality
The pin assignment at the gate driver IC generally differentiates between the input side and the output side.
Table 1 General pin assignment Pins Designation
1 to 8 input side, input logic signal side, or low voltage side 9 to 16 output side, driver power side, or high voltage side For simplicity reasons the driver is described as an IGBT driver. For use with MOSFETs and other power switches simply replace any mentioning of collector and emitter with their corresponding pin names.
3.1 Pin configuration Table 2 Pin configuration table abbreviations Abbreviation Description
Pin type
PWR
Power supply and gate current output pins
I/O
Digital input and output pin
I
Digital input pin
GND
Ground reference pin
AI
Analog input pin Buffer type
OD
Open drain output
CMOS
CMOS compatible input threshold levels
PP
Push/pull output buffer
special
Special output/input function, see individual description Pull device
PD
Pull-down resistor
CS
Current source
Table 3 Pin configuration Pin Pin name Pin type Buffer type Pull Function no. device
1 GND1 GND – – Ground input side 2 VCC1 PWR – – Positive power supply input side 3 ADJA AI special CS Parameter adjust set A 4 ADJB AI special CS Parameter adjust set B 5 RDYC I/O OD, CMOS – Combined ready output, high active and fault clear input and soft-off input, low active 6 FLT_N I/O OD, CMOS – Fault output, low active and soft- off input, low active 7 IN I CMOS PD, 40 kΩ Non inverted driver input Datasheet 7 v2.0 2020-03-26 Document Outline Table of contents 1 Block diagram 2 Related products 3 Pin configuration and functionality 3.1 Pin configuration 3.2 Pin functionality 4 Functional description 4.1 Start-up and fault clearing 4.2 Supply 4.2.1 Input side undervoltage lockout, VCC1 UVLO 4.2.2 Output side under-voltage lockout, VCC2 UVLO 4.3 Input side logic 4.3.1 IN non-inverting driver input 4.3.2 RDYC ready status output, fault-off and fault clear input 4.3.2.1 RDYC fault-off input 4.3.2.2 RDYC fault clear input 4.3.3 FLT_N status output and fault-off input 4.3.3.1 FLT_N fault-off input 4.4 Desaturation protection 4.4.1 DESAT behavior 4.4.2 DESAT filter and leading edge blanking time adjustment with ADJB 4.5 Gate driver output 4.5.1 Turn-on behavior 4.5.2 Turn-off and fault turn-off behavior 4.5.2.1 Hard switching turn-off 4.5.2.2 Soft turn-off 4.5.2.2.1 Soft-off current source adjustment with ADJA 4.5.3 Active shut-down 4.5.4 Active Miller clamp 4.5.4.1 CLAMP output types 4.5.5 Switch-off timeout until forced switch-off 4.6 Short circuit clamping 5 Electrical parameters 5.1 Absolute maximum ratings 5.2 Thermal parameters 5.3 Operating parameters 5.4 Electrical characteristics 5.4.1 Voltage supply 5.4.2 Logic input and output 5.4.3 Analog input 5.4.4 Gate driver 5.4.5 Active Miller clamp 5.4.6 Dynamic characteristics 5.4.7 Desaturation protection 5.4.8 Soft-off current source 5.4.9 Over-temperature protection 6 Insulation characteristics 6.1 Certified according to VDE 0884-11 and IEC 60747-17 reinforced insulation (planned) 6.2 Recognized under UL 1577 (planned) 6.3 Reliability 7 Package information 8 Application notes 8.1 Reference layout for thermal data 8.2 Printed circuit board guidelines Revision history Disclaimer