Datasheet 1ED38x0Mc12M (1ED-X3 Digital) (Infineon) - 2
| Manufacturer | Infineon |
| Description | EiceDRIVER 1ED38x0Mc12M Enhanced. Single-channel isolated gate driver IC with I2C configurability for DESAT, Soft-off, UVLO, Miller clamp and two-level turn-off |
| Pages / Page | 47 / 2 — EiceDRIVER™ 1ED38x0Mc12M Enhanced. Datasheet. Device information. Product … |
| Revision | 02_00 |
| File Format / Size | PDF / 722 Kb |
| Document Language | English |
EiceDRIVER™ 1ED38x0Mc12M Enhanced. Datasheet. Device information. Product type. Output current. Isolation class. Marking. OPN
Model Line for this Datasheet
Text Version of Document
EiceDRIVER™ 1ED38x0Mc12M Enhanced Datasheet Device information Device information Product type Output current Isolation class Marking OPN
1ED3830MC12M 3 A (typ) reinforced 3830MC12 coming soon 1ED3860MC12M 6 A (typ) reinforced 3860MC12 coming soon 1ED3890MC12M 9 A (typ) reinforced 3890MC12 coming soon 1ED3830MU12M 3 A (typ) UL 1577 3830MU12
1ED3830MU12MXUMA1
1ED3860MU12M 6 A (typ) UL 1577 3860MU12
1ED3860MU12MXUMA1
1ED3890MU12M 9 A (typ) UL 1577 3890MU12
1ED3890MU12MXUMA1 Description
The 1ED38x0Mc12M family (X3 Digital) consists of galvanically isolated single channel gate driver ICs in a small PG-DSO-16 package with a large creepage and clearance of 8 mm. The gate driver ICs provide a typical peak output current of 3 A, 6 A, and 9 A. Adjustable control and protection functions are included to simplify the design of highly reliable systems. All parameter adjustments are done from the input side via the I2C interface (pin SDA and SCL). All logic I/O pins are supply voltage dependent 3.3 V or 5 V CMOS compatible and can be directly connected to a microcontroller. The data transfer across the galvanic isolation is realized by the integrated coreless transformer technology. VCC1 VCC2,H DESAT,H
EiceDRIVER
TM IN,H ON,H with digital interface OFF,H RDYC, FLT_N CLAMP,H GND2,H I2C GND1 VEE2,H
CPU
VCC1 VCC2,L DESAT,L
EiceDRIVER
TM ON,L IN,L with digital interface OFF,L RDYC, FLT_N CLAMP,L GND2,L GND1 VEE2,L
Figure 1 Typical application
Datasheet 2 v2.0 2020-03-26 Document Outline Table of contents 1 Block diagram 2 Related products 3 Pin configuration and functionality 3.1 Pin configuration 3.2 Pin functionality 3.3 Configurable parameters via I2C 4 Functional description 4.1 Start-up and fault clearing 4.2 Supply 4.3 Input side logic 4.4 I2C bus 4.5 Operating states 4.6 Measurement 4.7 Monitoring 4.8 Desaturation protection 4.8.1 DESAT behavior 4.9 Gate driver output 4.9.1 Turn-on behavior 4.9.2 Turn-off and fault turn-off behavior 4.9.2.1 Hard switching turn-off 4.9.2.2 Two-level turn-off 4.9.2.3 Soft turn-off 4.9.3 Active shut-down 4.9.4 Active Miller clamp 4.10 Short circuit clamping 5 Electrical parameters 5.1 Absolute maximum ratings 5.2 Thermal parameters 5.3 Operating parameters 5.4 Electrical characteristics 5.4.1 Voltage supply 5.4.2 Logic input and output 5.4.3 Gate driver 5.4.4 Active Miller clamp 5.4.5 Dynamic characteristics 5.4.6 Desaturation protection 5.4.7 Two-level turn-off 5.4.8 Soft-off current source 5.4.9 Over-temperature protection 5.4.10 ADC measurement 6 Insulation characteristics 6.1 Certified according to VDE 0884-11 and IEC 60747-17 reinforced insulation (planned) 6.2 Recognized under UL 1577 (planned) 7 Package information Revision history Disclaimer
1ED3830MC12M 3 A (typ) reinforced 3830MC12 coming soon 1ED3860MC12M 6 A (typ) reinforced 3860MC12 coming soon 1ED3890MC12M 9 A (typ) reinforced 3890MC12 coming soon 1ED3830MU12M 3 A (typ) UL 1577 3830MU12
1ED3830MU12MXUMA1
1ED3860MU12M 6 A (typ) UL 1577 3860MU12
1ED3860MU12MXUMA1
1ED3890MU12M 9 A (typ) UL 1577 3890MU12
1ED3890MU12MXUMA1 Description
The 1ED38x0Mc12M family (X3 Digital) consists of galvanically isolated single channel gate driver ICs in a small PG-DSO-16 package with a large creepage and clearance of 8 mm. The gate driver ICs provide a typical peak output current of 3 A, 6 A, and 9 A. Adjustable control and protection functions are included to simplify the design of highly reliable systems. All parameter adjustments are done from the input side via the I2C interface (pin SDA and SCL). All logic I/O pins are supply voltage dependent 3.3 V or 5 V CMOS compatible and can be directly connected to a microcontroller. The data transfer across the galvanic isolation is realized by the integrated coreless transformer technology. VCC1 VCC2,H DESAT,H
EiceDRIVER
TM IN,H ON,H with digital interface OFF,H RDYC, FLT_N CLAMP,H GND2,H I2C GND1 VEE2,H
CPU
VCC1 VCC2,L DESAT,L
EiceDRIVER
TM ON,L IN,L with digital interface OFF,L RDYC, FLT_N CLAMP,L GND2,L GND1 VEE2,L
Figure 1 Typical application
Datasheet 2 v2.0 2020-03-26 Document Outline Table of contents 1 Block diagram 2 Related products 3 Pin configuration and functionality 3.1 Pin configuration 3.2 Pin functionality 3.3 Configurable parameters via I2C 4 Functional description 4.1 Start-up and fault clearing 4.2 Supply 4.3 Input side logic 4.4 I2C bus 4.5 Operating states 4.6 Measurement 4.7 Monitoring 4.8 Desaturation protection 4.8.1 DESAT behavior 4.9 Gate driver output 4.9.1 Turn-on behavior 4.9.2 Turn-off and fault turn-off behavior 4.9.2.1 Hard switching turn-off 4.9.2.2 Two-level turn-off 4.9.2.3 Soft turn-off 4.9.3 Active shut-down 4.9.4 Active Miller clamp 4.10 Short circuit clamping 5 Electrical parameters 5.1 Absolute maximum ratings 5.2 Thermal parameters 5.3 Operating parameters 5.4 Electrical characteristics 5.4.1 Voltage supply 5.4.2 Logic input and output 5.4.3 Gate driver 5.4.4 Active Miller clamp 5.4.5 Dynamic characteristics 5.4.6 Desaturation protection 5.4.7 Two-level turn-off 5.4.8 Soft-off current source 5.4.9 Over-temperature protection 5.4.10 ADC measurement 6 Insulation characteristics 6.1 Certified according to VDE 0884-11 and IEC 60747-17 reinforced insulation (planned) 6.2 Recognized under UL 1577 (planned) 7 Package information Revision history Disclaimer
