Datasheet AD845 (Analog Devices) - 7

AD845 MEASURING AD845 SETTLING TIME
stable, accurately defined gain. Low input bias currents and fast Figure 1 shows AD845 settling time performance. This measure- settling are achieved with the FET input AD845. ment was accomplished by driving the amplifier in the unity Most monolithic instrumentation amplifiers do not have the gain inverting mode with a fast pulse generator. The input high frequency performance of the circuit in Figure 3. The cir- summing junction was measured using false nulling techniques. cuit bandwidth is 10.9 MHz at a gain of 1 and 8.8 MHz at a Settling time is defined as the interval of time from the application gain of 10; settling time for the entire circuit is 900 ns to 0.01% of an ideal step function input until the closed-loop amplifier for a 10 V step (Gain = 10). output has entered and remains within a specified error band. The capacitors employed in this circuit greatly improve the Components of settling time include: amplifier’s settling time and phase margin. 1. Propagation time through the amplifier 2. Slewing time to approach the final output value 3. Recovery time from overload associated with the slewing 4. Linear settling to within a specified error band These individual components can be seen easily in Figure 1. Settling time is extremely important in high speed applications where the current output of a DAC must be converted to a voltage. When driving a 500 W load in parallel with a 100 pF capacitor, the AD845 settles to 0.1% in 250 ns and to 0.01% in 310 ns. Figure 3. High Performance, High Speed Instrumentation Amplifier
Table I. Performance Summary for the 3-Op Amp Instrumentation Amplifier Circuit 3-Op Amp In-Amp
Figure 1. Settling Characteristics 0 V to 10 V Step
Small Signal Settling Time
Upper Trace: Output of AD845 Under Test (5 V/Div)
Gain RG Bandwidth to 0.01%
Lower Trace: Error Voltage (1 mV/Div) 1 Open 10.9 MHz 500 ns 2 2 kW 8.8 MHz 500 ns 10 226 W 2.6 MHz 900 ns 100 20 W 290 kHz 7.5 ms Note: Resistors around the amplifiers’ input pins need to be small enough in value so that the RC time constant they form, with stray circuit capacitance, does not reduce circuit bandwidth. Figure 2. Settling Time Test Circuit
A HIGH SPEED INSTRUMENTATION AMP
The 3-op amp instrumentation amplifier circuit shown in Figure 3 can provide a range of gains from unity up to 1000 and Figure 4. The Pulse Response of the 3-Op Amp higher. The instrumentation amplifier configuration features Instrumentation Amplifier. Gain = 1, Horizontal Scale = high common-mode rejection, balanced differential inputs, and 0.5 ms/Div and Vertical Scale = 5 V/Div. REV. E –7– Document Outline FEATURES AC PERFORMANCE: DC PERFORMANCE: CONNECTION DIAGRAMS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS METALIZATION PHOTOGRAPH ORDERING GUIDE Typical Performance Characteristics MEASURING AD845 SETTLING TIME A HIGH SPEED INSTRUMENTATION AMP DRIVING THE ANALOG INPUT OF AN A/D CONVERTER OUTLINE DIMENSIONS Revision History