Datasheet ADL5521 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 400 MHz TO 4000 MHz Low Noise Amplifier |
| Pages / Page | 24 / 1 — 400 MHz to 4000 MHz. Low Noise Amplifier. Data Sheet. ADL5521. FEATURES. … |
| Revision | C |
| File Format / Size | PDF / 1.5 Mb |
| Document Language | English |
400 MHz to 4000 MHz. Low Noise Amplifier. Data Sheet. ADL5521. FEATURES. FUNCTIONAL BLOCK DIAGRAM
Model Line for this Datasheet
Text Version of Document
400 MHz to 4000 MHz Low Noise Amplifier Data Sheet ADL5521 FEATURES FUNCTIONAL BLOCK DIAGRAM Operation from 400 MHz to 4000 MHz ACTIVE VBIAS 1 8 VPOS BIAS Noise figure of 0.8 dB at 900 MHz Requires few external components RFIN 2 7 RFOUT Integrated active bias control circuit NIC 3 6 NIC Integrated dc blocking capacitors Adjustable bias for low power applications NIC 4 5 NIC ADL5521 Single-supply operation from 3 V to 5 V
-001
NIC = NO INTERNAL CONNECTION. Gain of 20.8 dB at 900 MHz DO NOT CONNECT TO THIS PIN.
6828 0
OIP3 of 37.0 dBm at 900 MHz
Figure 1.
P1dB of 21.8 dBm at 900 MHz Small footprint LFCSP Pin-compatible version with 21.5 dB gain available GENERAL DESCRIPTION
The ADL5521 is a high performance GaAs pHEMT low noise The ADL5521 is easy to tune, requiring only a few external amplifier. It provides high gain and low noise figure for single- components. The device can support operation from 3 V to 5 V, downconversion IF sampling receiver architectures as well as and the current draw can be adjusted with the external bias direct-downconversion receivers. resistor for applications requiring low power consumption. The ADL5521 provides a high level of integration by incorporating The ADL5521 comes in a compact, thermally enhanced, 3 mm × the active bias and dc blocking capacitors, making it very easy 3 mm LFCSP and operates over the temperature range of to use while not sacrificing design flexibility. −40°C to +85C. A fully populated evaluation board is also available.
Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2008–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS AC SPECIFICATIONS DC SPECIFICATIONS DE-EMBEDDED S-PARAMETERS, VPOS = 3 V TO 5 V, RFIN = PORT 1, VPOS = PORT 2, RFOUT = PORT 3 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS 900 MHz, VPOS = 5 V 1950 MHz, VPOS = 5 V 2600 MHZ, VPOS = 5 V 3500 MHz, VPOS = 5 V 900 MHz, VPOS = 3 V 1950 MHz, VPOS = 3 V 2600 MHZ, VPOS = 3 V 3500 MHZ, VPOS = 3 V DC CHARACTERISTICS BASIC CONNECTIONS EVALUATION BOARD SOLDERING INFORMATION AND RECOMMENDED PCB LAND PATTERN TUNING THE ADL5521 FOR OPTIMAL NOISE FIGURE TUNING S22 TUNING THE LNA INPUT FOR OPTIMAL GAIN TUNING THE LNA INPUT FOR OPTIMAL NOISE FIGURE S11 OF THE LNA WITH S22 MATCHED OUTLINE DIMENSIONS ORDERING GUIDE
-001
NIC = NO INTERNAL CONNECTION. Gain of 20.8 dB at 900 MHz DO NOT CONNECT TO THIS PIN.
6828 0
OIP3 of 37.0 dBm at 900 MHz
Figure 1.
P1dB of 21.8 dBm at 900 MHz Small footprint LFCSP Pin-compatible version with 21.5 dB gain available GENERAL DESCRIPTION
The ADL5521 is a high performance GaAs pHEMT low noise The ADL5521 is easy to tune, requiring only a few external amplifier. It provides high gain and low noise figure for single- components. The device can support operation from 3 V to 5 V, downconversion IF sampling receiver architectures as well as and the current draw can be adjusted with the external bias direct-downconversion receivers. resistor for applications requiring low power consumption. The ADL5521 provides a high level of integration by incorporating The ADL5521 comes in a compact, thermally enhanced, 3 mm × the active bias and dc blocking capacitors, making it very easy 3 mm LFCSP and operates over the temperature range of to use while not sacrificing design flexibility. −40°C to +85C. A fully populated evaluation board is also available.
Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2008–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS AC SPECIFICATIONS DC SPECIFICATIONS DE-EMBEDDED S-PARAMETERS, VPOS = 3 V TO 5 V, RFIN = PORT 1, VPOS = PORT 2, RFOUT = PORT 3 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS 900 MHz, VPOS = 5 V 1950 MHz, VPOS = 5 V 2600 MHZ, VPOS = 5 V 3500 MHz, VPOS = 5 V 900 MHz, VPOS = 3 V 1950 MHz, VPOS = 3 V 2600 MHZ, VPOS = 3 V 3500 MHZ, VPOS = 3 V DC CHARACTERISTICS BASIC CONNECTIONS EVALUATION BOARD SOLDERING INFORMATION AND RECOMMENDED PCB LAND PATTERN TUNING THE ADL5521 FOR OPTIMAL NOISE FIGURE TUNING S22 TUNING THE LNA INPUT FOR OPTIMAL GAIN TUNING THE LNA INPUT FOR OPTIMAL NOISE FIGURE S11 OF THE LNA WITH S22 MATCHED OUTLINE DIMENSIONS ORDERING GUIDE
