Datasheet ADL5521 (Analog Devices) - 8

ManufacturerAnalog Devices
Description400 MHz TO 4000 MHz Low Noise Amplifier
Pages / Page24 / 8 — ADL5521. Data Sheet. 1950 MHz, VPOS = 5 V. 2.0. S21. 1.8. 1.6. 1.4. 1.2. …
RevisionC
File Format / SizePDF / 1.5 Mb
Document LanguageEnglish

ADL5521. Data Sheet. 1950 MHz, VPOS = 5 V. 2.0. S21. 1.8. 1.6. 1.4. 1.2. R E. URE. S11. 1.0. M –10. F E. 0.8. ARA –15. -P S. 0.6. –20. S12. –25. 0.4. S22. –30. 0.2. –35

ADL5521 Data Sheet 1950 MHz, VPOS = 5 V 2.0 S21 1.8 1.6 1.4 1.2 R E URE S11 1.0 M –10 F E 0.8 ARA –15 -P S 0.6 –20 S12 –25 0.4 S22 –30 0.2 –35

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ADL5521 Data Sheet 1950 MHz, VPOS = 5 V
Matched for optimal noise figure, external matching circuit included.
20 2.0 S21 15 1.8 10 1.6 5 B) 1.4 d B) ( 0 S (d 1.2 R E –5 T URE E S11 1.0 IG M –10 F E 0.8 ARA –15 IS -P S NO 0.6 –20 S12 –25 0.4 S22 –30 0.2 –35 0 1800 1850 1900 1950 2000 2050 2100 2150 2200
09 12 0
1800 1820 1840 1860 1880 1900 1920 1940 1960 1980 2000
0 8- 8-
FREQUENCY (MHz)
82
FREQUENCY (MHz)
82 06 06 Figure 9. Typical S-Parameters, Log Magnitude Figure 12. Noise Figure vs. Frequency at 25°C, Multiple Devices
18 45 18.0 39 –40°C GAIN 16 40 17.5 37 +85°C B) 14 35 17.0 35 OIP3 +25°C OIP3 (d ) ) IN 16.5 33 12 30 A Bm –40°C Bm d d D G ) 16.0 31 +25°C 10 25 B ( B B ( d AN 1d ( 1d 15.5 +85°C 29 IN 8 P1dB 20 URE GA 15.0 GAIN 27 IG 3 AND P 3 AND P F 6 15 E IP 14.5 25 IP IS O O +25°C –40°C P1dB 4 10 NO 14.0 23 2 5 NOISE FIGURE 13.5 21 +85°C 0 0 13.0 19 1920 1930 1940 1950 1960 1970 1980
10 13 0
1920 1930 1940 1950 1960 1970 1980
0 8- 8-
FREQUENCY (MHz)
82
FREQUENCY (MHz)
82 06 06 Figure 10. Noise Figure, Gain, OIP3, and P1dB vs. Frequency Figure 13. Gain, OIP3, and P1dB vs. Temperature
2.0 40 1.8 38 –40°C 1.6 36 +85°C +85°C 1.4 34 B) +25°C (d 1.2 ) 32 +25°C m URE B 1.0 d IG 30 3 ( F E 0.8 IS OIP 28 NO 0.6 26 –40°C 0.4 24 0.2 22 0 20 1800 1820 1840 1860 1880 1900 1920 1940 1960 1980 2000
11 4 0
–8 –6 –4 –2 0 2 4 6 8 10 12 14 16 18 20
01 8- 8-
FREQUENCY (MHz)
82
P
82 06
OUT PER TONE (dBm)
06 Figure 11. Noise Figure vs. Temperature Figure 14. OIP3 vs. Output Power (POUT) and Temperature Rev. C | Page 8 of 24 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS AC SPECIFICATIONS DC SPECIFICATIONS DE-EMBEDDED S-PARAMETERS, VPOS = 3 V TO 5 V, RFIN = PORT 1, VPOS = PORT 2, RFOUT = PORT 3 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS 900 MHz, VPOS = 5 V 1950 MHz, VPOS = 5 V 2600 MHZ, VPOS = 5 V 3500 MHz, VPOS = 5 V 900 MHz, VPOS = 3 V 1950 MHz, VPOS = 3 V 2600 MHZ, VPOS = 3 V 3500 MHZ, VPOS = 3 V DC CHARACTERISTICS BASIC CONNECTIONS EVALUATION BOARD SOLDERING INFORMATION AND RECOMMENDED PCB LAND PATTERN TUNING THE ADL5521 FOR OPTIMAL NOISE FIGURE TUNING S22 TUNING THE LNA INPUT FOR OPTIMAL GAIN TUNING THE LNA INPUT FOR OPTIMAL NOISE FIGURE S11 OF THE LNA WITH S22 MATCHED OUTLINE DIMENSIONS ORDERING GUIDE