AD8273TYPICAL PERFORMANCE CHARACTERISTICS VS = ±15 V, TA = 25°C, G = ½, difference amplifier configuration, unless otherwise noted. 400N: 1641100MEAN: –9.5 SD: 228.4300+2.9µV/°C80200μV) (60SET100SFTFHIO0EM40TSYS –10020–1.7µV/°C–200 36 0 REPRESENTATIVE SAMPLES 1- 0–300 98 –500–2500250500 30 –50–30–101030507090110130 06 -0 V 81 OSO ±15V (µV/V)TEMPERATURE (°C) 69 0 Figure 4. Typical Distribution of System Offset Voltage, Figure 7. System Offset vs. Temperature, Normalized at 25°C, G = ½, Referred to Output Referred to Output 150N: 1649 MEAN: –0.59120SD: 37.310010050V) V/80(µ0SRTO RHI60ER–50IN A40G –10020–150REPRESENTATIVE SAMPLES0–200 8 –150–100–50050100150 31 02 –45 –30–150153045607590105120 0 1- 1- 98 CMRR ±15V (µV/V) 98 TEMPERATURE (°C) 06 06 Figure 5. Typical Distribution of CMRR, G = ½, Referred to Input Figure 8. Gain Error vs. Temperature, Normalized at 25°C 20300V, +25VG = ½15) (V2010+0.09µV/V/°CE GVS = ±15VA15T L10–13.5V, +11.5V+13.5V, +11.5V) /V10E VOVDµO50–0.05µV/V/°C-MRR (N OCM0MM –10–13.5V, –11.5V+13.5V, –11.5V–5O C T–10PU –20IN–150V, –25VREPRESENTATIVE SAMPLES–20–30 3 29 –50–30–101030507090110130–15–10–5051015 05 -0 1- 81 OUTPUT VOLTAGE (V) 98 TEMPERATURE (°C) 69 06 0 Figure 6. CMRR vs. Temperature, Normalized at 25°C Figure 9. Input Common-Mode Voltage vs. Output Voltage, Gain = ½, ±15 V Supplies Rev. B | Page 6 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONFIGURATIONS POWER SUPPLIES OUTLINE DIMENSIONS ORDERING GUIDE