Datasheet AD628 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | High Common-Mode Voltage, Programmable Gain Difference Amplifier |
| Pages / Page | 20 / 9 — AD628. TYPICAL PERFORMANCE CHARACTERISTICS. 140. 8440 UNITS. G = +0.1. … |
| Revision | G |
| File Format / Size | PDF / 361 Kb |
| Document Language | English |
AD628. TYPICAL PERFORMANCE CHARACTERISTICS. 140. 8440 UNITS. G = +0.1. 120. 100. S IT. R (. –15V. +15V. R S. % O. +2.5V. –1.6. –1.2. –0.8. –0.4. 0.4. 0.8. 1.2
Model Line for this Datasheet
Text Version of Document
AD628 TYPICAL PERFORMANCE CHARACTERISTICS 40 140 8440 UNITS G = +0.1 35 120 30 100 25 S IT B) 80 d 20 UN R ( –15V +15V F R S 60 P % O 15 +2.5V 40 10 5 20 0 0 –1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0
05
0.1 1 10 100 1k 10k 100k 1M
08 0 0 2- 2-
INPUT OFFSET VOLTAGE (mV)
99
FREQUENCY (Hz)
99 02 02 Figure 5. Typical Distribution of Input Offset Voltage, Figure 8. PSRR vs. Frequency, Single and Dual Supplies VS = ±15 V, SOIC_N Package
25 1000 8440 UNITS ) 20 /√Hz V n Y ( IT S 15 T NS UNI DE F E O IS % 10 NO E LTAG 5 O V 0 100 –74 –78 –82 –86 –90 –94 –98 –102 –106 –110
09 06
1 10 100 1k 10k 100k
0 0 2- 2- 99
CMRR (dB)
99
FREQUENCY (Hz)
02 02 Figure 6. Typical Distribution of CMRR, SOIC_N Package Figure 9. Voltage Noise Spectral Density, RTI, VS = ±15 V
130 1000 120 ) 110 /√Hz V 100 n ( Y VS = ±15V IT 90 B) d NS ( 80 DE RR E IS CM 70 V NO S = ±2.5V E 60 LTAG 50 O V 40 30 100 10 100 1k 10k 100k
10 07
1 10 100 1k 10k 100k
0 0 2- 2- 99
FREQUENCY (Hz)
99
FREQUENCY (Hz)
02 02 Figure 7. CMRR vs. Frequency Figure 10. Voltage Noise Spectral Density, RTI, VS = ±2.5 V Rev. G | Page 9 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION APPLICATIONS INFORMATION GAIN ADJUSTMENT INPUT VOLTAGE RANGE VOLTAGE LEVEL CONVERSION CURRENT LOOP RECEIVER MONITORING BATTERY VOLTAGES FILTER CAPACITOR VALUES KELVIN CONNECTION OUTLINE DIMENSIONS ORDERING GUIDE
05
0.1 1 10 100 1k 10k 100k 1M
08 0 0 2- 2-
INPUT OFFSET VOLTAGE (mV)
99
FREQUENCY (Hz)
99 02 02 Figure 5. Typical Distribution of Input Offset Voltage, Figure 8. PSRR vs. Frequency, Single and Dual Supplies VS = ±15 V, SOIC_N Package
25 1000 8440 UNITS ) 20 /√Hz V n Y ( IT S 15 T NS UNI DE F E O IS % 10 NO E LTAG 5 O V 0 100 –74 –78 –82 –86 –90 –94 –98 –102 –106 –110
09 06
1 10 100 1k 10k 100k
0 0 2- 2- 99
CMRR (dB)
99
FREQUENCY (Hz)
02 02 Figure 6. Typical Distribution of CMRR, SOIC_N Package Figure 9. Voltage Noise Spectral Density, RTI, VS = ±15 V
130 1000 120 ) 110 /√Hz V 100 n ( Y VS = ±15V IT 90 B) d NS ( 80 DE RR E IS CM 70 V NO S = ±2.5V E 60 LTAG 50 O V 40 30 100 10 100 1k 10k 100k
10 07
1 10 100 1k 10k 100k
0 0 2- 2- 99
FREQUENCY (Hz)
99
FREQUENCY (Hz)
02 02 Figure 7. CMRR vs. Frequency Figure 10. Voltage Noise Spectral Density, RTI, VS = ±2.5 V Rev. G | Page 9 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION APPLICATIONS INFORMATION GAIN ADJUSTMENT INPUT VOLTAGE RANGE VOLTAGE LEVEL CONVERSION CURRENT LOOP RECEIVER MONITORING BATTERY VOLTAGES FILTER CAPACITOR VALUES KELVIN CONNECTION OUTLINE DIMENSIONS ORDERING GUIDE
