Datasheet LTC3636, LTC3636-1 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Dual Channel 6A, 20V Monolithic Synchronous Step-Down Regulator |
| Pages / Page | 28 / 8 — PIN FUNCTIONS. ITH1 (Pin 1):. ITH2 (Pin 8):. RUN1 (Pin 2):. FB2 (Pin 9):. … |
| Revision | C |
| File Format / Size | PDF / 1.5 Mb |
| Document Language | English |
PIN FUNCTIONS. ITH1 (Pin 1):. ITH2 (Pin 8):. RUN1 (Pin 2):. FB2 (Pin 9):. MODE/SYNC (Pin 3):. PGOOD2 (Pin 10):. TRACKSS2 (Pin 11):
Model Line for this Datasheet
Text Version of Document
link to page 18 LTC3636/LTC3636-1
PIN FUNCTIONS ITH1 (Pin 1):
Channel 1 Error Amplifier Output and it below 1V places the part into shutdown. Do not float Switching Regulator Compensation Pin. Connect this pin this pin. to appropriate external components to compensate the
ITH2 (Pin 8):
Channel 2 Error Amplifier Output and regulator loop frequency response. Connect this pin to Switching Regulator Compensation Pin. Connect this pin INTVCC to use the default internal compensation. to appropriate external components to compensate the
RUN1 (Pin 2):
Channel 1 Regulator Enable Pin. Enables regulator loop frequency response. Connect this pin to channel 1 operation by tying RUN above 1.25V. Tying INTVCC to use the default internal compensation. it below 1V places the part into shutdown. Do not float
V
this pin.
FB2 (Pin 9):
Channel 2 Output Feedback Voltage Pin. Input to the error amplifier that compares the feedback
MODE/SYNC (Pin 3):
Mode Select and External voltage to the internal 0.6V reference voltage. Connect this Synchronization Input. Tie this pin to ground to force con- pin to a resistor divider network to program the desired tinuous synchronous operation. Floating this pin or tying output voltage. it to INTVCC enables high efficiency Burst Mode operation
PGOOD2 (Pin 10):
Channel 2 Open-Drain Power Good at light loads. Drive this pin with a clock to synchronize Output Pin. PGOOD2 is pulled to ground when the voltage the LTC3636/LTC3636-1 switching frequency. An internal on the V phase-locked loop will force the bottom power NMOS’s FB2 pin is not within ±8% (typical) of the inter- nal 0.6V reference. PGOOD2 becomes high impedance turn on signal to be synchronized with the rising edge of once the V the CLKIN signal. When this pin is driven with a clock, FB2 pin returns to within ±5% (typical) of the internal reference. forced continuous mode is automatically selected.
TRACKSS2 (Pin 11):
Output Tracking and Soft-Start Input
RT (Pin 4):
Oscillator Frequency Program Pin. Connect an Pin for Channel 2. Forcing a voltage below 0.6V on this pin external resistor (between 80k to 640k) from this pin to bypasses the internal reference input to the error ampli- GND in order to program the frequency from 500kHz to fier. The LTC3636/LTC3636-1 will servo the FB pin to the 4MHz. When RT is tied to INTVCC, the switching frequency TRACK voltage. Above 0.6V, the tracking function stops will default to 2MHz. and the internal reference resumes control of the error
INTVCC (Pin 5):
Internal 3.3V Regulator Output. The inter- amplifier. An internal 1.4μA pull up current from INTVCC nal power drivers and control circuits are powered from allows a soft-start function to be implemented by connect- this voltage. Decouple this pin to power ground with a ing a capacitor between this pin and PGND. minimum of 4.7µF low ESR ceramic capacitor.
GND (Pins 12, 18, 19, 25):
Power and Signal Ground.
TMON (Pin 6):
Temperature Monitor Output. A voltage These pins must be tied together and soldered to PCB proportional to the measured on-die temperature will ground. appear at this pin. The voltage-to-temperature scaling fac-
SW2 (Pins 13, 17):
Channel 2 Switch Node Connection tor is 200°K/V. See the Applications Information section to External Inductor. Voltage swing of SW is from a diode for detailed information on the TMON function. Tie this voltage drop below ground to V pin to INTV IN. CC to disable the temperature monitor circuit.
BOOST2 (Pin 14):
Boosted Floating Driver supply for
RUN2 (Pin 7):
Channel 2 Regulator Enable Pin. Enables Channel 2. The (+) terminal of the bootstrap capacitor channel 2 operation by tying RUN above 1.22V. Tying connects to this pin while the (–) terminal connects to Rev. C 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS ITH1 (Pin 1):
Channel 1 Error Amplifier Output and it below 1V places the part into shutdown. Do not float Switching Regulator Compensation Pin. Connect this pin this pin. to appropriate external components to compensate the
ITH2 (Pin 8):
Channel 2 Error Amplifier Output and regulator loop frequency response. Connect this pin to Switching Regulator Compensation Pin. Connect this pin INTVCC to use the default internal compensation. to appropriate external components to compensate the
RUN1 (Pin 2):
Channel 1 Regulator Enable Pin. Enables regulator loop frequency response. Connect this pin to channel 1 operation by tying RUN above 1.25V. Tying INTVCC to use the default internal compensation. it below 1V places the part into shutdown. Do not float
V
this pin.
FB2 (Pin 9):
Channel 2 Output Feedback Voltage Pin. Input to the error amplifier that compares the feedback
MODE/SYNC (Pin 3):
Mode Select and External voltage to the internal 0.6V reference voltage. Connect this Synchronization Input. Tie this pin to ground to force con- pin to a resistor divider network to program the desired tinuous synchronous operation. Floating this pin or tying output voltage. it to INTVCC enables high efficiency Burst Mode operation
PGOOD2 (Pin 10):
Channel 2 Open-Drain Power Good at light loads. Drive this pin with a clock to synchronize Output Pin. PGOOD2 is pulled to ground when the voltage the LTC3636/LTC3636-1 switching frequency. An internal on the V phase-locked loop will force the bottom power NMOS’s FB2 pin is not within ±8% (typical) of the inter- nal 0.6V reference. PGOOD2 becomes high impedance turn on signal to be synchronized with the rising edge of once the V the CLKIN signal. When this pin is driven with a clock, FB2 pin returns to within ±5% (typical) of the internal reference. forced continuous mode is automatically selected.
TRACKSS2 (Pin 11):
Output Tracking and Soft-Start Input
RT (Pin 4):
Oscillator Frequency Program Pin. Connect an Pin for Channel 2. Forcing a voltage below 0.6V on this pin external resistor (between 80k to 640k) from this pin to bypasses the internal reference input to the error ampli- GND in order to program the frequency from 500kHz to fier. The LTC3636/LTC3636-1 will servo the FB pin to the 4MHz. When RT is tied to INTVCC, the switching frequency TRACK voltage. Above 0.6V, the tracking function stops will default to 2MHz. and the internal reference resumes control of the error
INTVCC (Pin 5):
Internal 3.3V Regulator Output. The inter- amplifier. An internal 1.4μA pull up current from INTVCC nal power drivers and control circuits are powered from allows a soft-start function to be implemented by connect- this voltage. Decouple this pin to power ground with a ing a capacitor between this pin and PGND. minimum of 4.7µF low ESR ceramic capacitor.
GND (Pins 12, 18, 19, 25):
Power and Signal Ground.
TMON (Pin 6):
Temperature Monitor Output. A voltage These pins must be tied together and soldered to PCB proportional to the measured on-die temperature will ground. appear at this pin. The voltage-to-temperature scaling fac-
SW2 (Pins 13, 17):
Channel 2 Switch Node Connection tor is 200°K/V. See the Applications Information section to External Inductor. Voltage swing of SW is from a diode for detailed information on the TMON function. Tie this voltage drop below ground to V pin to INTV IN. CC to disable the temperature monitor circuit.
BOOST2 (Pin 14):
Boosted Floating Driver supply for
RUN2 (Pin 7):
Channel 2 Regulator Enable Pin. Enables Channel 2. The (+) terminal of the bootstrap capacitor channel 2 operation by tying RUN above 1.22V. Tying connects to this pin while the (–) terminal connects to Rev. C 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
