Datasheet TPS62902 (Texas Instruments) - 6
| Manufacturer | Texas Instruments |
| Description | 3-V to 17-V, 2-A, high-efficiency and low IQ buck converter 1.5-mm × 2-mm QFN package |
| Pages / Page | 50 / 6 — TPS62902. www.ti.com. PARAMETER. TEST CONDITIONS. MIN. TYP. MAX. UNIT. … |
| File Format / Size | PDF / 7.3 Mb |
| Document Language | English |
TPS62902. www.ti.com. PARAMETER. TEST CONDITIONS. MIN. TYP. MAX. UNIT. OUTPUT
Model Line for this Datasheet
Text Version of Document
TPS62902
SLVSFM1 – MARCH 2021
www.ti.com
VI = 3 V to 17 V, TJ = -40°C to +150°C, Typical values at VI = 12.0 V and TA = 25°C,unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ILIM_SINK Low-side FET sink current limit 1.3 1.7 2.5 A fSW Switching frequency 2.5-MHz selection 2.5 MHz TON(MIN) Minimum On-time 50 ns fSW Switching frequency 1.0-MHz selection 1.0 MHz D Dutycycle 1
OUTPUT
VSET Configuration selected. T V J = 25 O_Reg1 Output Voltage Regulation -0.9% +0.9% °C. VSET Configuration selected. 0 °C< VO_Reg2 Output Voltage Regulation -1.1% +1.1% TJ <85 °C VSET Configuration selected. -40 °C< VO_Reg3 Output Voltage Regulation -1.25% +1.25% TJ <150 °C VFB Feedback Regulation Voltage Adjustable Configuration selected 0.6 V VFB_Reg1 Feedback Voltage Regulation FB-Option selected. TJ = 25 °C. -0.6% +0.6% VFB_Reg2 Feedback Voltage Regulation FB-Option selected. 0 °C< TJ <85 °C. -0.65% +0.65% FB-Option selected. -40 °C< T V J <150 FB_Reg3 Feedback Voltage Regulation -0.9% +0.9% °C IFB Input leakage current into FB pin Adjustable configuration, VFB = 0.6 V 1 70 nA IO = 0 mA, time from EN=HIGH Start-up delay time until start switching, Adjustable 600 1400 µs Configuration selected Tdelay IO = 0 mA, time from EN=HIGH until start switching, VSET Configuration Start-up delay time 650 1850 µs selected. The typical value is based on the first option of VSET configuration. IO = 0 mA after Tdelay, from 1st TSS Soft-Start time switching pulse until target VO; TR/SS- 150 200 µs Pin = OPEN ISS SS/TR source current 2.3 2.5 2.7 µA Tracking Gain, Adjustable VFB/VSS/TR 0.75 Configuration VFB/VSS/TR Tracking Gain tolerance ±8 mV Discharge = ON - Option Selected, EN RDISCH Active Discharge Resistance 7.5 20 Ω = LOW, 6 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62902 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Mode Selection and Device Configuration MODE/S-CONF 7.3.2 Adjustable VO Operation (External Voltage Divider) 7.3.3 Setable VO Operation (VSET and Internal Voltage Divider) 7.3.4 Soft Start / Tracking (SS/TR) 7.3.5 Smart Enable with Precise Threshold 7.3.6 Power Good (PG) 7.3.7 Undervoltage Lockout (UVLO) 7.3.8 Current Limit And Short Circuit Protection 7.3.9 Thermal Shutdown 7.4 Device Functional Modes 7.4.1 Pulse Width Modulation (PWM) Operation 7.4.2 AEE (Automatic Efficiency Enhancement) 7.4.3 Power Save Mode Operation (Auto PFM/PWM) 7.4.4 100% Duty-Cycle Operation 7.4.5 Output Discharge Function 7.4.6 Starting into a Pre-Biased Load 8 Application and Implementation 8.1 Application Information 8.2 Typical Application with Adjustable Output Voltage 8.2.1 Design Requirements 8.2.2 Detailed Design Procedure 8.2.2.1 Custom Design With WEBENCH® Tools 8.2.2.2 Programming the Output Voltage 8.2.2.3 External Component Selection 8.2.2.4 Inductor Selection 8.2.2.5 Capacitor Selection 8.2.2.5.1 Output Capacitor 8.2.2.5.2 Input Capacitor 8.2.2.5.3 Soft-Start Capacitor 8.2.2.6 Tracking Function 8.2.2.7 Output Filter and Loop Stability 8.2.3 Application Curves 8.2.4 Typical Application with Setable VO using VSET 8.2.4.1 Design Requirements 8.2.4.2 Detailed Design Procedure 8.2.4.3 Application Curves 8.3 System Examples 8.3.1 LED Power Supply 8.3.2 Powering Multiple Loads 8.3.3 Voltage Tracking 8.3.4 Precise Soft-Start Timing 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 10.2.1 Thermal Considerations 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.1.1.1 Custom Design With WEBENCH® Tools 11.2 Receiving Notification of Documentation Updates 11.3 Support Resources 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Mechanical, Packaging, and Orderable Information
SLVSFM1 – MARCH 2021
www.ti.com
VI = 3 V to 17 V, TJ = -40°C to +150°C, Typical values at VI = 12.0 V and TA = 25°C,unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ILIM_SINK Low-side FET sink current limit 1.3 1.7 2.5 A fSW Switching frequency 2.5-MHz selection 2.5 MHz TON(MIN) Minimum On-time 50 ns fSW Switching frequency 1.0-MHz selection 1.0 MHz D Dutycycle 1
OUTPUT
VSET Configuration selected. T V J = 25 O_Reg1 Output Voltage Regulation -0.9% +0.9% °C. VSET Configuration selected. 0 °C< VO_Reg2 Output Voltage Regulation -1.1% +1.1% TJ <85 °C VSET Configuration selected. -40 °C< VO_Reg3 Output Voltage Regulation -1.25% +1.25% TJ <150 °C VFB Feedback Regulation Voltage Adjustable Configuration selected 0.6 V VFB_Reg1 Feedback Voltage Regulation FB-Option selected. TJ = 25 °C. -0.6% +0.6% VFB_Reg2 Feedback Voltage Regulation FB-Option selected. 0 °C< TJ <85 °C. -0.65% +0.65% FB-Option selected. -40 °C< T V J <150 FB_Reg3 Feedback Voltage Regulation -0.9% +0.9% °C IFB Input leakage current into FB pin Adjustable configuration, VFB = 0.6 V 1 70 nA IO = 0 mA, time from EN=HIGH Start-up delay time until start switching, Adjustable 600 1400 µs Configuration selected Tdelay IO = 0 mA, time from EN=HIGH until start switching, VSET Configuration Start-up delay time 650 1850 µs selected. The typical value is based on the first option of VSET configuration. IO = 0 mA after Tdelay, from 1st TSS Soft-Start time switching pulse until target VO; TR/SS- 150 200 µs Pin = OPEN ISS SS/TR source current 2.3 2.5 2.7 µA Tracking Gain, Adjustable VFB/VSS/TR 0.75 Configuration VFB/VSS/TR Tracking Gain tolerance ±8 mV Discharge = ON - Option Selected, EN RDISCH Active Discharge Resistance 7.5 20 Ω = LOW, 6 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS62902 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Mode Selection and Device Configuration MODE/S-CONF 7.3.2 Adjustable VO Operation (External Voltage Divider) 7.3.3 Setable VO Operation (VSET and Internal Voltage Divider) 7.3.4 Soft Start / Tracking (SS/TR) 7.3.5 Smart Enable with Precise Threshold 7.3.6 Power Good (PG) 7.3.7 Undervoltage Lockout (UVLO) 7.3.8 Current Limit And Short Circuit Protection 7.3.9 Thermal Shutdown 7.4 Device Functional Modes 7.4.1 Pulse Width Modulation (PWM) Operation 7.4.2 AEE (Automatic Efficiency Enhancement) 7.4.3 Power Save Mode Operation (Auto PFM/PWM) 7.4.4 100% Duty-Cycle Operation 7.4.5 Output Discharge Function 7.4.6 Starting into a Pre-Biased Load 8 Application and Implementation 8.1 Application Information 8.2 Typical Application with Adjustable Output Voltage 8.2.1 Design Requirements 8.2.2 Detailed Design Procedure 8.2.2.1 Custom Design With WEBENCH® Tools 8.2.2.2 Programming the Output Voltage 8.2.2.3 External Component Selection 8.2.2.4 Inductor Selection 8.2.2.5 Capacitor Selection 8.2.2.5.1 Output Capacitor 8.2.2.5.2 Input Capacitor 8.2.2.5.3 Soft-Start Capacitor 8.2.2.6 Tracking Function 8.2.2.7 Output Filter and Loop Stability 8.2.3 Application Curves 8.2.4 Typical Application with Setable VO using VSET 8.2.4.1 Design Requirements 8.2.4.2 Detailed Design Procedure 8.2.4.3 Application Curves 8.3 System Examples 8.3.1 LED Power Supply 8.3.2 Powering Multiple Loads 8.3.3 Voltage Tracking 8.3.4 Precise Soft-Start Timing 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 10.2.1 Thermal Considerations 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.1.1.1 Custom Design With WEBENCH® Tools 11.2 Receiving Notification of Documentation Updates 11.3 Support Resources 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Mechanical, Packaging, and Orderable Information
