Datasheet PMG1-S1 (Infineon) - 6

ManufacturerInfineon
DescriptionPower Delivery Microcontroller Gen1
Pages / Page41 / 6 — PMG1-S1 Datasheet. Block Diagram. Color Key:Power Modes. PMG1-S1 MCU. …
File Format / SizePDF / 1.7 Mb
Document LanguageEnglish

PMG1-S1 Datasheet. Block Diagram. Color Key:Power Modes. PMG1-S1 MCU. CYPM1111-40LQXI. System Resources. Power. Clocks. Test. Reset

PMG1-S1 Datasheet Block Diagram Color Key:Power Modes PMG1-S1 MCU CYPM1111-40LQXI System Resources Power Clocks Test Reset

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PMG1-S1 Datasheet Block Diagram Color Key:Power Modes PMG1-S1 MCU
Active/Sleep
CYPM1111-40LQXI
Deep Sleep
System Resources
K) e
Power Clocks
CL kag P rix Sleep Control ILO IMO ck ( Pac o Mat POR REF Clock Control FN l cl I/O ra -Q PWRSYS WDT ble he ), 40 rip WIC mma Pe ra OVT
Test
og 2 Test Mode Entry Pr
Reset
ing
USB PD Subsystem
Reset Control Digital DFT includ XRES Analog DFT s ( PIO 2x PFET Gate Drivers m 7 G 1 e
CPU Subsystem
IO) syst M ub (M S ct SWD/TC ne IO Cortex M0 con er 48 MHz Int al er FAST MUL iph NVIC, IRQMUX AHB) er Per ay SPCIF le L Flash Sing 128 KB ect ( Read Accelerator nn rco ESD te Pads, SRAM em In 12 KB Syst SRAM Controller ROM 16 KB ROM Controller Document Number: 002-31597 Rev. *B Page 5 of 40 Document Outline PMG1-S1 Datasheet, Power Delivery Microcontroller Gen1 PMG1 Family General Description PMG1-S1 General Description Features USB-PD Type-C Legacy Charging (source and sink) Mux Integrated VBUS Load Switch Controller LDO 32-bit MCU Subsystem Integrated Digital Blocks Authentication Clocks and Oscillators Operating Range Hot-Swappable I/Os Packages Block Diagram Contents Development Support Documentation Online Tools ModusToolbox™ IDE and PMG1 SDK Functional Overview USB-PD Subsystem (SS) USB-PD Physical Layer VCONN FET ADC USB 2.0 Mux VBUS Discharge VBUS Regulator Gate Driver for VBUS PFET on Consumer Path Charger Detect High-Voltage Tolerant CC Lines VBUS Load Switch Controller for Provider Path RCP CSA Slew-Rate Controllable Gate Driver Overvoltage and Undervoltage Protection on VBUS Overcurrent Protection on VBUS True Random Number Generator CPU and Memory Subsystem CPU Flash SROM SRAM Peripherals Timer/Counter/PWM Block (TCPWM) GPIO Power System Overview Pinouts Application Diagrams Electrical Specifications Absolute Maximum Ratings Device-Level Specifications DC Specifications CPU GPIO XRES Digital Peripherals Pulse Width Modulation (PWM) for GPIO Pins I2C UART SPI Memory System Resources Power-on-Reset (POR) with Brown Out SWD Interface Internal Main Oscillator Internal Low-speed Oscillator PD Analog-to-Digital Converter Charger Detect VSYS Switch CSA VBUS UV/OV Consumer Side PFET Gate Driver Provider Side PFET Gate Driver Provider Side PFET RCP DP/DM Switch VCONN Switch VBUS Ordering Information Ordering Code Definitions Packaging Acronyms Document Conventions Units of Measure Document History Page Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC® Solutions Cypress Developer Community Technical Support