BRT11, BRT12, BRT13 www.vishay.com Vishay Semiconductors PACKAGE MARKING (example) BRT12H V YWW H 68 Notes • “YWW” is the date code marking (Y = year code, WW = week code) • VDE logo is only marked on option 1 parts • Tape and reel suffix (T) is not part of the package marking SOLDER PROFILESHANDLING AND STORAGE CONDITIONS TTW Soldering (according to CECC00802) ESD level: HBM class 2 300 10000 5 s Floor life: unlimited Lead temperature Conditions: Tamb < 30 °C, RH < 85 % 250 235 °C to Second Full line: typical 260 °C Moisture sensitivity level 1, according to J-STD-020 wave First wave Dotted lines: 200 1000 process limits ca. 200 K/s ca. 2 K/s ne ine ne 150 100 °C to 1st li 2nd l 2nd li 130 °C 100 100 Temperature (°C) 2 K/s ca. 5 K/s 50 Forced cooling 0 10 0 50 100 150 200 250 948626-1 Time (s) Fig. 9 - Wave Soldering Double Wave Profile According to J-STD-020 for DIP Devices Axis Title 300 10000 Max. 260 °C 255 °C 250 245 °C 240 °C 217 °C 200 1000 Max. 30 s ine ne ne 150 1st li 2nd l 2nd li Max. 120 s Max. 100 s 100 100 Temperature (°C) Max. ramp down 6 °C/s 50 Max. ramp up 3 °C/s 0 10 0 50 100 150 200 250 300 19841-1 Time (s) Fig. 10 - Lead (Pb)-free Reflow Solder Profile According to J-STD-020 for SMD Devices Rev. 1.8, 14-Jul-2021 7 Document Number: 83689 For technical questions, contact: optocoupleranswers@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000