Datasheet CA3080, CA3080A (Intersil) - 5
| Manufacturer | Intersil |
| Description | 2MHz, Operational Transconductance Amplifier (OTA) |
| Pages / Page | 11 / 5 — Typical Applications. (Continued). 2.0k. V+ = +15V. 0.01. 3N138. INPUT. … |
| File Format / Size | PDF / 1.2 Mb |
| Document Language | English |
Typical Applications. (Continued). 2.0k. V+ = +15V. 0.01. 3N138. INPUT. CA3080A. OUTPUT. 220. 300pF. 30k. SLEW RATE (IN SAMPLE MODE) = 1.3V/
Model Line for this Datasheet
Text Version of Document
CA3080, CA3080A
Typical Applications (Continued) 2.0k V+ = +15V 7 0.01
F 3N138 2 - INPUT CA3080A 6 OUTPUT 3 + 220 2.0k 4 0.01
F 300pF 3k 5 30k SLEW RATE (IN SAMPLE MODE) = 1.3V/
s STORAGE AND PHASE ACQUISITION TIME = 3
s (NOTE) COMPENSATION NETWORK SAMPLE 0V HOLD -15V V- = -15V
NOTE: Time required for output to settle within 3mV of a 4V step.
FIGURE 4. SCHEMATIC DIAGRAM OF THE CA3080A IN A SAMPLE-HOLD CONFIGURATION 30k STROBE 1N914 0 SAMPLE +15V -15 HOLD 1N914 0.1
F +15V 5 0.1
F 3.6k 2k 7 INPUT + 7 3 2k CA3080A 6 3 + 2 - CA3140 6 4 2 - 4 0.1 1
F 0.1
F 5 2k -15V 100k 2k -15V 200pF 2k 200pF 400 0.1
F 30pF SIMULATED LOAD NOT REQUIRED FIGURE 5. SAMPLE AND HOLD CIRCUIT
FN475 Rev.6.00 Page 5 of 11 Jan 13, 2017
Typical Applications (Continued) 2.0k V+ = +15V 7 0.01
F 3N138 2 - INPUT CA3080A 6 OUTPUT 3 + 220 2.0k 4 0.01
F 300pF 3k 5 30k SLEW RATE (IN SAMPLE MODE) = 1.3V/
s STORAGE AND PHASE ACQUISITION TIME = 3
s (NOTE) COMPENSATION NETWORK SAMPLE 0V HOLD -15V V- = -15V
NOTE: Time required for output to settle within 3mV of a 4V step.
FIGURE 4. SCHEMATIC DIAGRAM OF THE CA3080A IN A SAMPLE-HOLD CONFIGURATION 30k STROBE 1N914 0 SAMPLE +15V -15 HOLD 1N914 0.1
F +15V 5 0.1
F 3.6k 2k 7 INPUT + 7 3 2k CA3080A 6 3 + 2 - CA3140 6 4 2 - 4 0.1 1
F 0.1
F 5 2k -15V 100k 2k -15V 200pF 2k 200pF 400 0.1
F 30pF SIMULATED LOAD NOT REQUIRED FIGURE 5. SAMPLE AND HOLD CIRCUIT
FN475 Rev.6.00 Page 5 of 11 Jan 13, 2017
