Datasheet MAX78000 (Analog Devices) - 5

link to page 23 link to page 24 link to page 24 link to page 24 link to page 25 link to page 25 link to page 25 link to page 26 link to page 35 MAX78000 Artificial Intelligence Microcontroller with Ultra-Low- Power Convolutional Neural Network Accelerator LIST OF FIGURES Figure 1. SPI Master Mode Timing Diagram . 23 Figure 2. SPI Slave Mode Timing Diagram . 24 Figure 3. I2C Timing Diagram . 24 Figure 4. I2S Timing Diagram . 25 Figure 5. Parallel Camera Interface Timing Diagram . 25 Figure 6. 1-Wire Master Data Timing Diagram . 26 Figure 7. Clocking Scheme Diagram. 35 www.maximintegrated.com Maxim Integrated | 5 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 81-CTBGA Electrical Characteristics Electrical Characteristics (continued) Electrical Characteristics—SPI Electrical Characteristics—SPI (continued) Electrical Characteristics—I2C Electrical Characteristics—I2C (continued) Electrical Characteristics—I2S Electrical Characteristics—I2S (continued) Electrical Characteristics—PCIF Electrical Characteristics—1-Wire Master Electrical Characteristics—1-Wire Master (continued) Pin Configuration 81 CTBGA Pin Description 81 CTBGA Detailed Description Arm Cortex-M4 with FPU Processor and RISC-V RV32 Processor Convolutional Neural Network Accelerator (CNN) Memory Internal Flash Memory Internal SRAM Comparators Dynamic Voltage Scaling (DVS) Controller Clocking Scheme General-Purpose I/O and Special Function Pins Parallel Camera Interface (PCIF) Analog-to-Digital Converter Single-Inductor Multiple-Output Switch-Mode Power Supply (SIMO SMPS) Power Management Power Management Unit ACTIVE Mode SLEEP Mode LOW POWER Mode (LPM) MICRO POWER Mode (μPM) STANDBY Mode BACKUP Mode POWER DOWN Mode (PDM) Wakeup Sources Real-Time Clock Programmable Timers 32-Bit Timer/Counter/PWM (TMR, LPTMR) Watchdog Timer (WDT) Pulse Train Engine (PT) Serial Peripherals I2C Interface (I2C) I2S Interface (I2S) Serial Peripheral Interface (SPI) UART (UART, LPUART) 1-Wire Master (OWM) Standard DMA Controller Security AES True Random Number Generator (TRNG) Non-Deterministic Random Bit Generator (NDRBG) CRC Module Bootloader Secure Boot Debug and Development Interface (SWD, JTAG) Applications Information Bypass Capacitors Ordering Information Revision History