Datasheet ESP32-C6 (Espressif) - 2

link to page 46 link to page 46 Product Overview The ESP32-C6 SoC (System on Chip) supports Wi-Fi 6 in 2.4 GHz band, Bluetooth 5, Zigbee 3.0 and Thread 1.3. It consists of a high-performance (HP) 32-bit RISC-V processor, an low-power (LP) 32-bit RISC-V processor, wireless baseband and MAC (Wi-Fi, Bluetooth LE, and 802.15.4), RF module, and numerous peripherals. Wi-Fi, Bluetooth and 802.15.4 coexist with each other and share the same antenna. The functional block diagram of the SoC is shown below. Espressif’s ESP32-C6 Wi-Fi + Bluetooth® Low Energy + 802.15.4 SoC CPU System Wireless MAC and RF Baseband ⚙ 2.4 GHz Balun + Switch HP RISC-V LP RISC-V Wi-Fi Wi-Fi MAC 32-bit 32-bit Baseband Microprocessor Microprocessor 2.4 GHz Transmitter Bluetooth LE Bluetooth LE Baseband Link Controller Cache SRAM 2.4 GHz Receiver LP Memory 802.15.4 802.15.4 JTAG ROM Baseband MAC RF Synthesizer Peripherals Power Management ⚙ ⚙ ⚙ ⚙ SPI I2C GPIO LP IO Power Management Unit ⚙ ⚙ ⚙ RTC Watchdog TWAI® I2S UART Timer Security ⚙ ⚙ ⚙ Super GDMA PCNT RMT Watchdog ⚙ ⚙ ⚙ ⚙ SHA RSA ECC ⚙ ⚙ ⚙ LED PWM ETM ADC LP UART ⚙ Digital ⚙ ⚙ ⚙ ⚙ USB Serial/ ⚙ ⚙ AES HMAC PARLIO MCPWM Signature LP I2C JTAG ⚙ Clock ⚙ TEE ⚙ SDIO 2.0 ⚙ Brownout ⚙ Temperature ⚙ eFuse RNG Glitch Filter Controller Slave Detector Sensor Controller ⚙ ⚙ General-Purpose ⚙ Main System ⚙ Secure ⚙ Flash System Timer APM Timers Watchdog Timers Boot Encryption Modules having power in specific power modes: Active Active and Modem-sleep Active, Modem-sleep, Light-sleep; ⚙ optional in Light-sleep All modes ⚙ optional in Deep-sleep ESP32-C6 Functional Block Diagram For more information on power consumption, see Section 3.9 Low Power Management. Espressif Systems 2 ESP32-C6 Series Datasheet v1.0 Submit Documentation Feedback Document Outline Product Overview Features Applications 1 ESP32-C6 Series Comparison 1.1 Nomenclature 1.2 Comparison 2 Pins 2.1 Pin Layout 2.2 Pin Overview 2.3 IO Pins 2.3.1 IO MUX and GPIO Pin Functions 2.3.2 LP IO MUX Functions 2.3.3 Analog Functions 2.3.4 Restrictions for GPIOs and LP GPIOs 2.4 Analog Pins 2.5 Power Supply 2.5.1 Power Pins 2.5.2 Power Scheme 2.5.3 Chip Power-up and Reset 2.6 Strapping Pins 2.6.1 SDIO Sampling and Driving Clock Edge Control 2.6.2 Chip Boot Mode Control 2.6.3 ROM Messages Printing Control 2.6.4 JTAG Signal Source Control 2.7 Pin Mapping Between Chip and Flash 3 Functional Description 3.1 CPU and Memory 3.1.1 HP CPU 3.1.2 LP CPU 3.1.3 Internal Memory 3.1.4 Off-package Flash 3.1.5 Address Mapping Structure 3.1.6 Cache 3.1.7 TEE Controller 3.1.8 Access Permission Management (APM) 3.1.9 Timeout Protection 3.2 System Clocks 3.2.1 CPU Clock 3.2.2 Low-Power Clocks 3.3 Analog Peripherals 3.3.1 Analog-to-Digital Converter (ADC) 3.3.2 Temperature Sensor 3.4 Digital Peripherals 3.4.1 Universal Asynchronous Receiver Transmitter (UART) 3.4.2 Serial Peripheral Interface (SPI) 3.4.3 I2C Interface 3.4.4 I2S Interface 3.4.5 Pulse Count Controller (PCNT) 3.4.6 USB Serial/JTAG Controller 3.4.7 TWAI Controller 3.4.8 SDIO 2.0 Slave Controller 3.4.9 LED PWM Controller 3.4.10 Motor Control PWM (MCPWM) 3.4.11 Remote Control Peripheral 3.4.12 Parallel IO (PARLIO) Controller 3.4.13 General DMA Controller (GDMA) 3.4.14 Event Task Matrix (ETM) 3.5 Radio 3.5.1 2.4 GHz Receiver 3.5.2 2.4 GHz Transmitter 3.5.3 Clock Generator 3.6 Wi-Fi 3.6.1 Wi-Fi Radio and Baseband 3.6.2 Wi-Fi MAC 3.6.3 Networking Features 3.7 Bluetooth LE 3.7.1 Bluetooth LE PHY 3.7.2 Bluetooth LE Link Controller 3.8 802.15.4 3.8.1 802.15.4 PHY 3.8.2 802.15.4 MAC 3.9 Low Power Management 3.10 Timers 3.10.1 System Timer 3.10.2 General Purpose Timers 3.10.3 Watchdog Timers 3.11 Cryptography/Security Components 3.11.1 AES Accelerator (AES) 3.11.2 ECC Accelerator (ECC) 3.11.3 HMAC Accelerator (HMAC) 3.11.4 RSA Accelerator (RSA) 3.11.5 SHA Accelerator (SHA) 3.11.6 Digital Signature (DS) 3.11.7 External Memory Encryption and Decryption (XTS_AES) 3.11.8 Random Number Generator (RNG) 3.12 Peripheral Pin Configurations 4 Electrical Characteristics 4.1 Absolute Maximum Ratings 4.2 Recommended Power Supply Characteristics 4.3 VDD_SPI Output Characteristics 4.4 DC Characteristics (3.3 V, 25 °C) 4.5 ADC Characteristics 4.6 Current Consumption 4.6.1 RF Current Consumption in Active Mode 4.6.2 Current Consumption in Other Modes 4.7 Reliability 5 RF Characteristics 5.1 Wi-Fi Radio 5.1.1 Wi-Fi RF Transmitter (TX) Characteristics 5.1.2 Wi-Fi RF Receiver (RX) Characteristics 5.2 Bluetooth LE Radio 5.2.1 Bluetooth LE RF Transmitter (TX) Characteristics 5.2.2 Bluetooth LE RF Receiver (RX) Characteristics 5.3 802.15.4 Radio 5.3.1 802.15.4 RF Transmitter (TX) Characteristics 5.3.2 802.15.4 RF Receiver (RX) Characteristics 6 Packaging 7 Related Documentation and Resources Appendix A – ESP32-C6 Consolidated Pin Overview Revision History