Datasheet TLV9101, TLV9102, TLV9104 (Texas Instruments) - 10

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TLV9101, TL V9102, TLV9104
SBOS943E – FEBRUARY 2019 – REVISED AUGUST 2021
www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings
over operating ambient temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage, VS = (V+) – (V–) 0 20 V Common-mode voltage(3) (V–) – 0.5 (V+) + 0.5 V Signal input pins Differential voltage(3) VS + 0.2 V Current(3) –10 10 mA Shutdown pin voltage V– V+ V Output short-circuit(2) Continuous Operating ambient temperature, TA –55 150 °C Junction temperature, TJ 150 °C Storage temperature, Tstg –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Short-circuit to ground, one amplifier per package. (3) Input pins are diode-clamped to the power-supply rails. Input signals that may swing more than 0.5 V beyond the supply rails must be current limited to 10 mA or less.
6.2 ESD Ratings VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V(ESD) Electrostatic discharge V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating ambient temperature range (unless otherwise noted)
MIN MAX UNIT
VS Supply voltage, (V+) – (V–) 2.7 16 V VI Input voltage range (V–) – 0.2 (V+) + 0.2 V VIH High level input voltage at shutdown pin (amplifier disabled) (V–) + 1.1 V+ V VIL Low level input voltage at shutdown pin (amplifier enabled) V– (V–) + 0.2 V TA Specified temperature –40 125 °C
6.4 Thermal Information for Single Channel TLV9101, TLV9101S DBV DCK DRL
(2)
THERMAL METRIC
(1)
UNIT (SOT-23) (SC70) (SOT-553) 5 PINS 6 PINS 5 PINS 5 PINS
RθJA Junction-to-ambient thermal resistance 192.2 174.6 204.7 TBD °C/W RθJC(top) Junction-to-case (top) thermal resistance 113.7 113.5 116.6 TBD °C/W RθJB Junction-to-board thermal resistance 60.6 55.9 51.9 TBD °C/W ψJT Junction-to-top characterization parameter 37.4 39.7 24.9 TBD °C/W ψJB Junction-to-board characterization parameter 60.4 55.7 51.6 TBD °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A TBD °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 10 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TLV9101 TLV9102 TLV9104 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information for Single Channel 6.5 Thermal Information for Dual Channel 6.6 Thermal Information for Quad Channel 6.7 Electrical Characteristics 6.8 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 EMI Rejection 7.3.2 Phase Reversal Protection 7.3.3 Thermal Protection 7.3.4 Capacitive Load and Stability 7.3.5 Common-Mode Voltage Range 7.3.6 Electrical Overstress 7.3.7 Overload Recovery 7.3.8 Typical Specifications and Distributions 7.3.9 Packages With an Exposed Thermal Pad 7.3.10 Shutdown 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Typical Applications 8.2.1 High Voltage Precision Comparator 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curve 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.1.1.1 TINA-TI™ (Free Software Download) 11.2 Documentation Support 11.2.1 Related Documentation 11.3 Receiving Notification of Documentation Updates 11.4 Support Resources 11.5 Trademarks 11.6 Electrostatic Discharge Caution 11.7 Glossary 12 Mechanical, Packaging, and Orderable Information