Datasheet ADG774 (Analog Devices) - 5

ManufacturerAnalog Devices
DescriptionCMOS 3 V/5 V, Wide Bandwidth Quad 2:1 Mux
Pages / Page12 / 5 — ADG774. PIN CONFIGURATION. (SOIC/QSOP). VDD. S1A. 15 EN. S1B. 14 S4A. 13 …
File Format / SizePDF / 139 Kb
Document LanguageEnglish

ADG774. PIN CONFIGURATION. (SOIC/QSOP). VDD. S1A. 15 EN. S1B. 14 S4A. 13 S4B. TOP VIEW. S2A. (Not to Scale) 12 D4. S2B. 11 S3A. 10 S3B. GND

ADG774 PIN CONFIGURATION (SOIC/QSOP) VDD S1A 15 EN S1B 14 S4A 13 S4B TOP VIEW S2A (Not to Scale) 12 D4 S2B 11 S3A 10 S3B GND

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ADG774 PIN CONFIGURATION (SOIC/QSOP) 1 IN 16 VDD 2 S1A 15 EN S1B 3 14 S4A 4 D1 ADG774 13 S4B TOP VIEW 5 S2A (Not to Scale) 12 D4 6 S2B 11 S3A 7 D2 10 S3B 8 GND 9 D3 TERMINOLOGY
VDD Most Positive Power Supply Potential. GND Ground (0 V) Reference. S Source Terminal. May be an input or output. D Drain Terminal. May be an input or output. IN Logic Control Input. EN Logic Control Input. RON Ohmic Resistance between D and S. RON On Resistance Match between any Two Channels, i.e., RON max – RON min. RFLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. IS (OFF) Source Leakage Current with the Switch OFF. ID (OFF) Drain Leakage Current with the Switch OFF. ID, IS (ON) Channel Leakage Current with the Switch ON. VD (VS) Analog Voltage on Terminals D, S. CS (OFF) OFF Switch Source Capacitance. CD (OFF) OFF Switch Drain Capacitance. CD, CS (ON) ON Switch Capacitance. tON Delay between Applying the Digital Control Input and the Output Switching on. See Test Circuit 4. tOFF Delay between Applying the Digital Control Input and the Output Switching Off. tD OFF Time or ON Time Measured between the 90% Points of Both Switches, When Switching from One Address State to Another. See Test Circuit 5. Crosstalk A Measure of Unwanted Signal that is Coupled through from One Channel to Another as a Result of Parasitic Capacitance. Off Isolation A Measure of Unwanted Signal Coupling through an OFF Switch. Bandwidth Frequency Response of the Switch in the ON State Measured at 3 dB Down. Distortion RFLAT(ON)/RL REV. C –5– Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION TERMINOLOGY Typical Performance Characteristics Test Circuits OUTLINE DIMENSIONS Revision History