Datasheet AT89S53 (Microchip)

Features
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Compatible with MCS-51™ Products
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12K Bytes of In-System Reprogrammable Downloadable Flash Memory – SPI Serial Interface for Program Downloading – Endurance: 1,000 Write/Erase Cycles
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4V to 6V Operating Range
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Fully Static Operation: 0 Hz to 24 MHz
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Three-level Program Memory Lock
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256 x 8-bit Internal RAM
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32 Programmable I/O Lines
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Three 16-bit Timer/Counters 8-bit
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Nine Interrupt Sources
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Programmable UART Serial Channel Microcontroller
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SPI Serial Interface
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Low-power Idle and Power-down Modes with 12K Bytes
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Interrupt Recovery From Power-down
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Programmable Watchdog Timer
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Dual Data Pointer Flash
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Power-off Flag Description AT89S53
The AT89S53 is a low-power, high-performance CMOS 8-bit microcomputer with 12K bytes of downloadable Flash programmable and erasable read only memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology
Not Recommended
and is compatible with the industry-standard 80C51 instruction set and pinout. The on-
for New Designs.
chip downloadable Flash allows the program memory to be reprogrammed in-system through an SPI serial interface or by a conventional nonvolatile memory programmer.
Use AT89S8253.
By combining a versatile 8-bit CPU with downloadable Flash on a monolithic chip, the Atmel AT89S53 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications. The AT89S53 provides the following standard features: 12K bytes of downloadable Flash, 256 bytes of RAM, 32 I/O lines, programmable watchdog timer, two Data Point- ers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S53 is designed with static logic for operation down to zero frequency and supports two soft- ware selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset. The downloadable Flash can change a single byte at a time and is accessible through the SPI serial interface. Holding RESET active forces the SPI bus into a serial pro- gramming interface and allows the program memory to be written to or read from unless Lock Bit 2 has been activated. 0787E–MICRO–3/06 Document Outline Block Diagram Instruction Set Features Description Pin Description VCC GND Port 0 Port 1 Pin Description Port 2 Port 3 RST ALE/PROG PSEN EA/VPP XTAL1 XTAL2 Special Function Registers Data Memory - RAM Programmable Watchdog Timer Timer 0 and 1 Timer 2 Capture Mode Auto-reload (Up or Down Counter) Baud Rate Generator Programmable Clock Out UART Serial Peripheral Interface Interrupts Oscillator Characteristics Idle Mode Status of External Pins During Idle and Power-down Modes Power-down Mode Program Memory Lock Bits Lock Bit Protection Modes(1)(2) Programming the Flash Programming Interface Serial Downloading Either an external system clock is supplied at pin XTAL1 or a crystal needs to be connected across pins XTAL1 and XTAL2. The max... Serial Programming Algorithm Serial Programming Instruction Flash Parallel Programming Modes Flash Programming and Verification Characteristics - Parallel Mode Flash Programming and Verification Waveforms - Parallel Mode Serial Downloading Waveforms Absolute Maximum Ratings* DC Characteristics AC Characteristics External Program and Data Memory Characteristics External Program Memory Read Cycle External Data Memory Read Cycle External Data Memory Write Cycle External Clock Drive Waveforms External Clock Drive Serial Port Timing: Shift Register Mode Test Conditions Shift Register Mode Timing Waveforms AC Testing Input/Output Waveforms(1) Float Waveforms(1) Ordering Information Pin Configurations