Datasheet ACT 1 (Actel) - 4

P r o d u c t P l a n Speed Grade* Application Std –1 –2 –3 C I M B A1010B Device
44-pin Plastic Leaded Chip Carrier (PL) ✔ ✔ ✔ ✔ ✔ ✔ — — 68-pin Plastic Leaded Chip Carrier (PL) ✔ ✔ ✔ ✔ ✔ ✔ — — 100-pin Plastic Quad Flatpack (PQ) ✔ ✔ ✔ ✔ ✔ ✔ — — 80-pin Very Thin (1.0 mm) Quad Flatpack (VQ) ✔ ✔ ✔ ✔ ✔ — — — 84-pin Ceramic Pin Grid Array (PG) ✔ ✔ — — ✔ — ✔ ✔
A1020B Device
44-pin Plastic Leaded Chip Carrier (PL) ✔ ✔ ✔ ✔ ✔ ✔ — — 68-pin Plastic Leaded Chip Carrier (PL) ✔ ✔ ✔ ✔ ✔ ✔ — — 84-pin Plastic Leaded Chip Carrier (PL) ✔ ✔ ✔ ✔ ✔ ✔ — — 100-pin Plastic Quad Flatpack (PQ) ✔ ✔ ✔ ✔ ✔ ✔ — — 80-pin Very Thin (1.0 mm) Quad Flatpack (VQ) ✔ ✔ ✔ ✔ ✔ — — — 84-pin Ceramic Pin Grid Array (PG) ✔ ✔ — — ✔ — ✔ ✔ 84-pin Ceramic Quad Flatpack (CQ) ✔ ✔ — — ✔ — ✔ ✔
A10V10B Device
68-pin Plastic Leaded Chip Carrier (PL) ✔ — — — ✔ — — — 80-pin Very Thin (1.0 mm) Quad Flatpack (VQ) ✔ — — — ✔ — — —
A10V20B Device
68-pin Plastic Leaded Chip Carrier (PL) ✔ — — — ✔ — — — 84-pin Plastic Leaded Chip Carrier (PL) ✔ — — — ✔ — — — 80-pin Very Thin (1.0 mm) Quad Flatpack (VQ) ✔ — — — ✔ — — — Applications: C = Commercial Availability: ✔ = Available * Speed Grade: –1 = Approx. 15% faster than Standard I = Industrial P = Planned –2 = Approx. 25% faster than Standard M = Military — = Not Planned –3 = Approx. 35% faster than Standard B = MIL-STD-883
D e v i c e R e s o u r c e s User I/Os Device Logic Modules Gates 44-pin 68-pin 80-pin 84-pin 100-pin
A1010B, A10V10B 295 1200 34 57 57 57 57 A1020B, A10V20B 547 2000 34 57 69 69 69
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Document Outline ACT™ 1 Series FPGAs Features Description Product Family Profile The Designer and Designer Advantage™ Systems ACT 1 Device Structure The ACT 1 Logic Module I/O Buffers Device Organization Probe Pin ACT 1 Array Performance Temperature and Voltage Effects Logic Module Size Ordering Information Product Plan Device Resources Pin Description Absolute Maximum Ratings1 Free air temperature range Recommended Operating Conditions Electrical Specifications (5V) Electrical Specifications (3.3V) Package Thermal Characteristics General Power Equation Static Power Component Active Power Component Equivalent Capacitance CEQ Values for Actel FPGAs Fixed Capacitance Values for Actel FPGAs (pF) Determining Average Switching Frequency Functional Timing Tests Output Buffer Performance Derating (5V) Output Buffer Performance Derating (3.3V) ACT 1 Timing Module* Predictable Performance: Tight Delay Distributions... Timing Characteristics Critical Nets and Typical Nets Long Tracks Timing Derating Timing Derating Factor (Temperature and Voltage) Timing Derating Factor for Designs at Typical Temp... Temperature and Voltage Derating Factors (normaliz... Temperature and Voltage Derating Factors (normaliz... Junction Temperature and Voltage Derating Curves (... Parameter Measurement Output Buffer Delays AC Test Loads Input Buffer Delays Module Delays Sequential Timing Characteristics Flip-Flops and Latches ACT 1 Timing Characteristics (Worst-Case Commercial Conditions, VCC = 4.75 V,T... ACT 1 Timing Characteristics (continued) (Worst-Case Commercial Conditions) ACT 1 Timing Characteristics (continued) (Worst-Case Commercial Conditions) Package Pin Assignments 44-Pin PLCC 68-Pin PLCC Package Pin Assignments (continued) 84-Pin PLCC Package Pin Assignments (continued) 100-Pin PQFP Package Pin Assignments (continued) 80-Pin VQFP Package Pin Assignments (continued) 84-Pin CPGA Package Pin Assignments (continued) 84-Pin CQFP