Datasheet OP270 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | Dual Very Low Noise Precision Operational Amplifier |
| Pages / Page | 20 / 3 — Data Sheet. OP270. SPECIFICATIONS. Table 1. OP270E. OP270F. OP270G. … |
| Revision | F |
| File Format / Size | PDF / 329 Kb |
| Document Language | English |
Data Sheet. OP270. SPECIFICATIONS. Table 1. OP270E. OP270F. OP270G. Parameter Symbol. Test. Conditions. Min. Typ. Max. Min Typ. Unit
Model Line for this Datasheet
Text Version of Document
Data Sheet OP270 SPECIFICATIONS
VS = ±15 V, TA = 25°C, unless otherwise noted.
Table 1. OP270E OP270F OP270G Parameter Symbol Test Conditions Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage VOS 10 75 20 150 50 250 μV Input Offset Current IOS VCM = 0 V 1 10 3 15 5 20 nA Input Bias Current IB VCM = 0 V 5 20 10 40 15 60 nA Input Noise Voltage1 en p-p 0.1 Hz to 10 Hz 80 200 80 200 80 nV p-p Input Noise Voltage Density2 en fO = 10 Hz 3.6 6.5 3.6 6.5 3.6 nV/√Hz en fO = 100 Hz 3.2 5.5 3.2 5.5 3.2 nV/√Hz en fO = 1 kHz 3.2 5.0 3.2 5.0 3.2 nV/√Hz Input Noise Current Density in fO = 10 Hz 1.1 1.1 1.1 pA/√Hz in fO = 100 Hz 0.7 0.7 0.7 pA/√Hz in fO = 1 kHz 0.6 0.6 0.6 pA/√Hz Large-Signal Voltage Gain AVO VO = ±10 V, 1500 2300 1000 1700 750 1500 V/mV RL = 10 kΩ VO = ±10 V, 750 1200 500 900 350 700 V/mV RL = 2 kΩ Input Voltage Range3 IVR ±12 ±12.5 ±12 ±12.5 ±12 ±12.5 V Output Voltage Swing VO RL ≥ 2 kΩ ±12 ±13.5 ±12 ±13.5 ±12 ±13.5 V Common-Mode Rejection CMR VCM = ±11 V 106 125 100 120 90 110 dB Power Supply Rejection PSRR VS = ±4.5 V 0.56 3.2 1.0 5.6 1.5 5.6 μV/V Ratio to ±18 V Slew Rate SR 1.7 2.4 1.7 2.4 1.7 2.4 V/μs Supply Current ISY No load 4 6.5 4 6.5 4 6.5 mA (All Amplifiers) Gain Bandwidth Product GBP 5 5 5 MHz Channel Separation1 CS VO = ±20 V p-p, 125 175 125 175 175 dB fO = 10 Hz Input Capacitance CIN 3 3 3 pF Input Resistance Differential Mode RIN 0.4 0.4 0.4 MΩ Common Mode RINCM 20 20 20 GΩ Settling Time tS AV = +1, 10 V, 5 5 5 μs step to 0.01% 1 Guaranteed but not 100% tested. 2 Sample tested. 3 Guaranteed by CMR test. Rev. F | Page 3 of 20 Document Outline Features Functional Block Diagrams General Description Table of Contents Revision History Specifications Electrical Specifications Absolute Maximum Ratings ESD Caution Typical Performance Characteristics Test Circuits Applications Information Voltage and Current Noise Total Noise and Source Resistance Noise Measurements Peak-to-Peak Voltage Noise Noise Measurement—Noise Voltage Density Noise Measurement—Current Noise Density Capacitive Load Driving and Power Supply Considerations Unity-Gain Buffer Applications Low Phase Error Amplifier Five-Band, Low Noise, Stereo Graphic Equalizer Digital Panning Control Dual Programmable Gain Amplifier Outline Dimensions Ordering Guide
VS = ±15 V, TA = 25°C, unless otherwise noted.
Table 1. OP270E OP270F OP270G Parameter Symbol Test Conditions Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage VOS 10 75 20 150 50 250 μV Input Offset Current IOS VCM = 0 V 1 10 3 15 5 20 nA Input Bias Current IB VCM = 0 V 5 20 10 40 15 60 nA Input Noise Voltage1 en p-p 0.1 Hz to 10 Hz 80 200 80 200 80 nV p-p Input Noise Voltage Density2 en fO = 10 Hz 3.6 6.5 3.6 6.5 3.6 nV/√Hz en fO = 100 Hz 3.2 5.5 3.2 5.5 3.2 nV/√Hz en fO = 1 kHz 3.2 5.0 3.2 5.0 3.2 nV/√Hz Input Noise Current Density in fO = 10 Hz 1.1 1.1 1.1 pA/√Hz in fO = 100 Hz 0.7 0.7 0.7 pA/√Hz in fO = 1 kHz 0.6 0.6 0.6 pA/√Hz Large-Signal Voltage Gain AVO VO = ±10 V, 1500 2300 1000 1700 750 1500 V/mV RL = 10 kΩ VO = ±10 V, 750 1200 500 900 350 700 V/mV RL = 2 kΩ Input Voltage Range3 IVR ±12 ±12.5 ±12 ±12.5 ±12 ±12.5 V Output Voltage Swing VO RL ≥ 2 kΩ ±12 ±13.5 ±12 ±13.5 ±12 ±13.5 V Common-Mode Rejection CMR VCM = ±11 V 106 125 100 120 90 110 dB Power Supply Rejection PSRR VS = ±4.5 V 0.56 3.2 1.0 5.6 1.5 5.6 μV/V Ratio to ±18 V Slew Rate SR 1.7 2.4 1.7 2.4 1.7 2.4 V/μs Supply Current ISY No load 4 6.5 4 6.5 4 6.5 mA (All Amplifiers) Gain Bandwidth Product GBP 5 5 5 MHz Channel Separation1 CS VO = ±20 V p-p, 125 175 125 175 175 dB fO = 10 Hz Input Capacitance CIN 3 3 3 pF Input Resistance Differential Mode RIN 0.4 0.4 0.4 MΩ Common Mode RINCM 20 20 20 GΩ Settling Time tS AV = +1, 10 V, 5 5 5 μs step to 0.01% 1 Guaranteed but not 100% tested. 2 Sample tested. 3 Guaranteed by CMR test. Rev. F | Page 3 of 20 Document Outline Features Functional Block Diagrams General Description Table of Contents Revision History Specifications Electrical Specifications Absolute Maximum Ratings ESD Caution Typical Performance Characteristics Test Circuits Applications Information Voltage and Current Noise Total Noise and Source Resistance Noise Measurements Peak-to-Peak Voltage Noise Noise Measurement—Noise Voltage Density Noise Measurement—Current Noise Density Capacitive Load Driving and Power Supply Considerations Unity-Gain Buffer Applications Low Phase Error Amplifier Five-Band, Low Noise, Stereo Graphic Equalizer Digital Panning Control Dual Programmable Gain Amplifier Outline Dimensions Ordering Guide
