Datasheet AD537 (Analog Devices) - 3

Applying the AD537 CIRCUIT OPERATION V-F CONNECTIONS FOR NEGATIVE INPUT VOLTAGE
Block diagrams of the AD537 are shown above. A versatile
OR CURRENT
operational amplifier (BUF) serves as the input stage; its pur- A wide range of negative input voltages can be accommodated pose is to convert and scale the input voltage signal to a drive with proper selection of the scaling resistor, as indicated in Fig- current in the NPN follower. Optimum performance is achieved ure 2. This connection, unlike the buffered positive connection, when, at the full-scale input voltage, a 1 mA drive current is is not high impedance since the 1 mA F.S. drive current must be delivered to the current-to-frequency converter. The drive cur- supplied by the signal source. However, very large negative volt- rent to the current-to-frequency converter (an astable ages beyond the supply can be handled easily; just modify the multivibrator) provides both the bias levels and the charging scaling resistors appropriately. Diode CR1 (HP50822811) is current to the externally connected timing capacitor. This necessary for overload and latchup protection for current or “adaptive” bias scheme allows the oscillator to provide low non- voltage inputs. linearity over the entire current input range of 0.1 µA to If the input signal is a true current source, R1 and R2 are not 2000 µA. The square wave oscillator output goes to the output used. Full-scale calibration can be accomplished by connecting a driver which provides a floating base drive to the NPN power 200 kΩ pot in series with a fixed 27 kΩ from Pin 7 to –VS (see transistor. This floating drive allows the logic interface to be ref- calibration section, below). erenced to a different level than –VS. The “SYNC” input (“D” package only) allows the oscillator to be slaved to an external
V I F IN
master oscillator; this input can also be used to shut off the
IN O = F 10 (R OUT = 1 + R2) C 10C AD537
oscillator.
1 14 fOUT 5k
Ω
(TYP) 0 TO –1mA
The reference generator uses a bandgap circuit (this allows
2 13 DRIVER +VS IIN
single-supply operation to 4.5 volts which is not possible with
3 12
low T.C. Zeners) to provide the reference and bias levels for the
CURR- C R1 CR1 BUF TO-FREQ
amplifier and oscillator stages. The reference generator also pro-
4 11 CONV R
vides the precision, low T.C. 1.00 volt output and the V
2 5 10
TEMP output which tracks absolute temperature at 1 mV/K.
6 V 9 20k
Ω
T PRECISION VOLTAGE VIN 7 VR REFERENCE 8 V-F CONNECTION FOR POSITIVE INPUT VOLTAGES 0 TO –10V
The positive voltage input range is from –VS (ground in single supply operation) to 4 volts below the positive supply. The con- Figure 2. V-F Connections for Negative Input Voltage or nection shown in Figure 1 provides a very high (250 MΩ) input Current impedance. The input voltage is converted to the proper drive current at Pin 3 by selecting a scaling resistor. The full-scale
CALIBRATION
current is 1 mA, so, for example a 10 volt range would require a There are two independent adjustments: scale and offset. The nominal 10 kΩ resistor. The trim range required will depend on first is trimmed by adjustment of the scaling resistor R and the capacitor tolerance. Full-scale currents other than 1 mA can be second by the (optional) potentiometer connected to +VS and chosen, but linearity will be reduced; 2 mA is the maximum the VOS pins (“D” package only). Precise calibration requires the allowable drive. use of an accurate voltage standard set to the desired FS value and a frequency meter; a scope is useful for monitoring output As indicated by the scaling relationship in Figure 1, a 0.01 µF waveshape. Verification of linearity requires the availability of a timing capacitor will give a 10 kHz full-scale frequency, and switchable voltage source (or a DAC) having a linearity error 0.001 µF will give 100 kHz with a 1 mA drive current. The below ± 0.005%, and the use of long measurement intervals to maximum frequency is 150 kHz. Polystyrene or NPO ceramic minimize count uncertainties. Every AD537 is automatically tested capacitors are preferred for T.C. and dielectric absorption; for linearity, and it will not usually be necessary to perform this polycarbonate or mica are acceptable; other types will degrade verification, which is both tedious and time-consuming. linearity. The capacitor should be wired very close to the AD537. Although drifts are small it is good practice to allow the operat- ing environment to attain stable temperature and to ensure that
V F IN
the supply, source and load conditions are proper. Begin by set-
O = 10 (R1 + R2) C AD537
ting the input voltage to 1/10,000 of full scale. Adjust the offset
1 14 fOUT
pot until the output frequency is 1/10,000 of full scale (for ex-
ROUT 2 13 +V
ample 1 Hz for FS of 10 kHz). This is most easily accomplished
GUARD RING DRIVER S
using a frequency meter connected to the output. Then apply
3 12 CURR- C
the FS input voltage and adjust the gain pot until the desired FS
R2 R1 BUF 4 TO-FREQ 11
frequency is indicated. In applications where the FS input is
CONV OPTIONAL 5 10
small, this adjustment will very slightly affect the offset voltage,
INPUT VIN 10k
Ω
10µF FILTER
due to the input bias current of the buffer amplifier. A change of
6 9 RT VT PRECISION 20k VOLTAGE
l kΩ in R will affect the input by approximately 100 µV, which is
7 VR REFERENCE 8
as much as 0.1% of a 100 mV FS range. Therefore, it may be necessary to repeat the offset and scale adjustments for the high- Figure 1. Standard V-F Connection for Positive Input est accuracy. The design of the input amplifier is such that the Voltages input voltage drift after offset nulling is typically below l µV/°C. REV. C –3–