Datasheet MAX4238, MAX4239 (Maxim) - 4
| Manufacturer | Maxim |
| Pages / Page | 9 / 4 — Electrical Characteristics. PARAMETER. SYMBOL. CONDITIONS. MIN. TYP. MAX. … |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
Electrical Characteristics. PARAMETER. SYMBOL. CONDITIONS. MIN. TYP. MAX. UNITS. Note 1:. Note 2:. Note 3:. Note 4:. Note 5:
Text Version of Document
MAX4238/MAX4239 Ultra-Low Offset/Drift, Low-Noise, Precision SOT23 Amplifiers
Electrical Characteristics
(2.7V ≤ VCC ≤ 5.5V, VCM = GND = 0V, VOUT = VCC/2, RL = 10kΩ connected to VCC/2, SHDN = VCC, TA = -40°C to +125°C, unless otherwise noted.) (Note 5)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
T Input Offset Voltage V A = -40°C to +85°C 2.5 OS (Note 1) µV TA = -40°C to +125°C 3.5 Input Offset Drift TCVOS (Note 1) 10 nV/°C Common-Mode Input Voltage VCC Range VCM Inferred from CMRR test VGND - 0.05 - 1.4 V VGND - 0.05V ≤ TA = -40°C to +85°C 115 Common-Mode Rejection Ratio CMRR VCM ≤ VCC – dB 1.4V (Note 1) TA = -40°C to +125°C 90 Power-Supply Rejection Ratio PSRR 2.7V ≤ VCC ≤ 5.5V (Note 1) 120 dB RL = 10kΩ, TA = -40°C to +85°C 125 0.1V ≤ VOUT ≤ V dB CC - 0.1V (Note 1) TA = -40°C to +125°C 95 Large-Signal Voltage Gain AVOL 0.1V ≤ VOUT ≤ VCC - 0.1V, R T L = 1kΩ A = -40°C to +85°C 120 (Note 1) dB 0.2V ≤ VOUT ≤ VCC - 0.2V, TA = -40°C to +125°C 80 V R CC - VOH 20 L = 10kΩ V Output Voltage Swing V OL 20 OH/VOL mV V R CC - VOH 100 L = 1kΩ VOL 100 Output Leakage Current 0V ≤ VOUT ≤ VCC, SHDN = GND (Note 3) 2 µA Supply Voltage Range VCC Inferred by PSRR test 2.7 5.5 V SHDN = V Supply Current I CC, no load, VCC = 5.5V 900 CC µA SHDN = GND, VCC = 5.5V 2 Shutdown Logic-High VIH 2.2 V Shutdown Logic-Low VIL 0.7 V Shutdown Input Current 0V ≤ VSHDN ≤ VCC 2 µA
Note 1:
Guaranteed by design. Thermocouple and leakage effects preclude measurement of this parameter during production testing. Devices are screened during production testing to eliminate defective units.
Note 2:
IN+ and IN- are gates to CMOS transistors with typical input bias current of 1pA. CMOS leakage is so small that it is impractical to test and guarantee in production. Devices are screened during production testing to eliminate defective units.
Note 3:
Leakage does not include leakage through feedback resistors.
Note 4:
Overload recovery time is the time required for the device to recover from saturation when the output has been driven to either rail.
Note 5:
Specifications are 100% tested at TA = +25°C, unless otherwise noted. Limits over temperature are guaranteed by design. www.maximintegrated.com Maxim Integrated │ 4
Electrical Characteristics
(2.7V ≤ VCC ≤ 5.5V, VCM = GND = 0V, VOUT = VCC/2, RL = 10kΩ connected to VCC/2, SHDN = VCC, TA = -40°C to +125°C, unless otherwise noted.) (Note 5)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
T Input Offset Voltage V A = -40°C to +85°C 2.5 OS (Note 1) µV TA = -40°C to +125°C 3.5 Input Offset Drift TCVOS (Note 1) 10 nV/°C Common-Mode Input Voltage VCC Range VCM Inferred from CMRR test VGND - 0.05 - 1.4 V VGND - 0.05V ≤ TA = -40°C to +85°C 115 Common-Mode Rejection Ratio CMRR VCM ≤ VCC – dB 1.4V (Note 1) TA = -40°C to +125°C 90 Power-Supply Rejection Ratio PSRR 2.7V ≤ VCC ≤ 5.5V (Note 1) 120 dB RL = 10kΩ, TA = -40°C to +85°C 125 0.1V ≤ VOUT ≤ V dB CC - 0.1V (Note 1) TA = -40°C to +125°C 95 Large-Signal Voltage Gain AVOL 0.1V ≤ VOUT ≤ VCC - 0.1V, R T L = 1kΩ A = -40°C to +85°C 120 (Note 1) dB 0.2V ≤ VOUT ≤ VCC - 0.2V, TA = -40°C to +125°C 80 V R CC - VOH 20 L = 10kΩ V Output Voltage Swing V OL 20 OH/VOL mV V R CC - VOH 100 L = 1kΩ VOL 100 Output Leakage Current 0V ≤ VOUT ≤ VCC, SHDN = GND (Note 3) 2 µA Supply Voltage Range VCC Inferred by PSRR test 2.7 5.5 V SHDN = V Supply Current I CC, no load, VCC = 5.5V 900 CC µA SHDN = GND, VCC = 5.5V 2 Shutdown Logic-High VIH 2.2 V Shutdown Logic-Low VIL 0.7 V Shutdown Input Current 0V ≤ VSHDN ≤ VCC 2 µA
Note 1:
Guaranteed by design. Thermocouple and leakage effects preclude measurement of this parameter during production testing. Devices are screened during production testing to eliminate defective units.
Note 2:
IN+ and IN- are gates to CMOS transistors with typical input bias current of 1pA. CMOS leakage is so small that it is impractical to test and guarantee in production. Devices are screened during production testing to eliminate defective units.
Note 3:
Leakage does not include leakage through feedback resistors.
Note 4:
Overload recovery time is the time required for the device to recover from saturation when the output has been driven to either rail.
Note 5:
Specifications are 100% tested at TA = +25°C, unless otherwise noted. Limits over temperature are guaranteed by design. www.maximintegrated.com Maxim Integrated │ 4
