Microsemi Corporation announced the new release and certification of its Core1553BRM v4.0 and Core1553BRT v4.0 intellectual property (IP) cores. Core1553BRT v4.0 and Core1553BRM v4.0 now support the company's mainstream SmartFusion®2 SoC FPGAs and IGLOO®2 FPGAs and include enhancements for its currently supported FPGA families. Microsemi's Core1553BRT and Core1553BRM provide the highest quality communication bus interface for military, commercial aviation and space applications.
Core1553 is based on MIL-STD-1553 supporting various bus protocols such as Remote Terminal (RT), Bus Controller (BC) and Monitor Terminal (MT). The updated cores were certified per the RT Validation Test Plan outlined in MIL-HDBK-1553 Appendix A. The certification was completed on SmartFusion2 SoC FPGAs.
Continued Microsemi Flight Heritage
Microsemi's Core1553 IP has been flown on the SOFIE scientific instrument of the Aeronomy of Ice in the Mesosphere (AIM) mission. Core1553 IP is also onboard the Commercial Orbital Transportation Service (COTS) for the International Space Station (ISS). The company looks forward to having flight heritage for Core1553 IP on many more programs, including the James Webb Space Telescope (JWST) and Joint Polar Satellite System (JPSS).
About SmartFusion2 SoC FPGAs
Microsemi's SmartFusion2 SoC FPGAs are designed to address fundamental requirements for advanced security, high reliability and low power in critical communications, industrial, defense, aviation and medical applications. SmartFusion2 SoC FPGAs integrate inherently reliable flash-based FPGA fabric, a 166 Mega-Hertz (MHz) ARM® Cortex™-M3 processor, advanced security processing accelerators, DSP blocks, SRAM, eNVM and industry-required high-performance communication interfaces with a 5 Gbps transceiver, all on a single chip.
About IGLOO2 FPGAs
Microsemi's IGLOO2 FPGAs continue the company's focus on addressing the needs of today's cost-optimized FPGA markets by providing a LUT-based fabric, 5 G transceivers, high speed GPIO, block RAM, a high-performance memory subsystem, and DSP blocks in a differentiated, cost and power optimized architecture. This next generation IGLOO2 FPGA architecture offers up to five times more logic density and three times more fabric performance than its predecessors and combines a nonvolatile flash-based fabric with the highest number of general purpose I/Os, 5 G SERDES interfaces and PCI Express® endpoints when compared to other products in its class. IGLOO2 FPGAs offer best-in-class feature integration coupled with the lowest power, highest reliability and most advanced security in the industry.
