New 256 Mb Device Delivers Up to 333 MBps of Read Bandwidth in a Low-Pin-Count Package; Addresses a Broad Range of the Highest-Performance Systems
Cypress Semiconductor Corp. expanded its NOR HyperFlash product line with the qualification of a new 256 Mb memory. The 3.0 V S26KL256S HyperFlash device is the latest addition to the industry's first flash memory family that supports the high-bandwidth, low-pin-count HyperBus interface. The device is ideal for high-performance applications, such as automotive instrument clusters, industrial automation, communication systems, and medical equipment, which need the highest read bandwidth to enable the fastest boot time for instant-on requirements, along with a low-pin-count interface to reduce package size and PCB cost.
Running at frequencies up to 166 MHz, HyperFlash products can achieve Double-Data-Rate (DDR) read bandwidths as high as 333 MBps for 1.8 V products and 200 MBps for 3.0 V products. The 256 Mb HyperFlash device is offered in a space-saving 48-mm2 24-ball package, and it delivers high reliability and extended temperature range of -40 degrees C to +125 degrees C. Cypress's HyperFlash memory family offers 3.0 V and 1.8 V versions and includes three densities: 128 Mb, 256 Mb and 512 Mb. Cypress HyperFlash devices provide a seamless migration path from Quad SPI to dual Quad SPI to HyperFlash memory, allowing system applications to be scaled to different levels of flash performance when paired with compatible controllers. This provides OEMs the ability to offer different product models with a single design.
Originally announced in 2014, the HyperBus interface is supported by an increasing number of chipset suppliers adopting the HyperBus high-performance solution for their next-generation products. Processors that have been publically announced to support the HyperBus interface include the Freescale MAC57D5xx Automotive DIS MCU, the Cypress FM4 S6E2DH general purpose MCU and the Cypress Traveo S6J324C and S6J326C automotive MCUs. Cypress is working closely with many processor companies and dozens of platforms are currently in development to support the HyperBus interface.
About Cypress HyperBus Interface
The efficient 12-pin Cypress HyperBus interface consists of an 8-pin address/data bus, a differential clock (2 signals), a chip select and a read data strobe for the controller – all of which help reduce the overall cost of the system through reduced pin count. Memories based on the interface enable systems with faster response times and rich user experiences. The Cypress HyperBus interface enables a wide range of high-performance applications, such as automotive instrument clusters, infotainment / navigation systems, handheld displays, digital cameras, projectors, industrial automation, communication systems, medical equipment, and home appliances.
Availability
Cypress's 3.0V, 256Mb S26KL256S HyperFlash is sampling now with production expected in the third quarter of 2015. It will be available in both 3.0 V and 1.8 V versions packaged in a market-compatible 6 mm × 8 mm ball grid array (BGA). It currently supports the Industrial-plus temperature range of –40 degrees C to +105 degrees C. Cypress will offer support for the extended temperature range of –40 degrees C to +125 degrees C at a later date. Both the 3.0 V and 1.8 V versions of the 512 Mb HyperFlash are sampling now, and the 128 Mb will begin sampling in the third quarter of 2015.
