Toshiba Electronics Europe announced their range of single-supply single-gate logic devices. In total the lineup consists of 31 devices that simplify the design of voltage-level translation as used in data communication between devices, such as between microprocessors and peripherals. These single-gate devices are provided in tiny packaging that ensure that voltage translation can be implemented even in applications with limited board space.
Previous voltage-level translation devices from Toshiba required two power sources; one for the input-side and one for the output-side. The new “7UL1G” and “7UL1T” series only require a single power source to support voltage-level translation. This simplifies board layout as well as negating concerns regarding power-on sequence for power supplies. These devices are suitable for applications utilizing multiple power domains that have limited board space such as smartphones, tablets, laptop PCs, digital camera, POS, and IoT equipment.
The 7UL1G series primarily target down translation to the voltage provided at the supply pins and offer 3.6 V-tolerant input terminals. When used with a 0.9 V power supply the devices can support down translation to 0.9 V from input signals that lie between 0.9 V and 3.6 V.
The 7UL1T series primarily support up translation to the voltage provided at the supply pins and operate with a power supply in the range of 2.3 V to 3.6 V. The input threshold is set at 50% or less of the power supply voltage. When powered from a 3.3 V supply, up translation to 3.3 V combined with logic-level translation is supported for input signals in the range of 1.65 V to 3.6 V.
Both the 7UL1G and 7UL1T are provided as single-gate NAND, NOR, AND, OR, XOR, inverter and non-inverter, Schmitt inverter and buffer, as well as 3-state buffer versions. The 7UL1G series are available in both SOT353 (2.0 × 2.1 × 0.9 mm) general purpose USV package and the SOT953 (1.0 × 1.0 × 0.48 mm) fSV package, the industry’s smallest lead-type package. The 7UL1T series are available in the SOT353 package with the exception of the Schmitt inverter and buffer.
