Datasheet Texas Instruments TMX320DM8148BCYE
| Manufacturer | Texas Instruments |
| Series | TMS320DM8148 |
| Part Number | TMX320DM8148BCYE |
DaVinci Digital Media Processor 684-FCBGA 0 to 90
Datasheets
TMS320DM814x DaVinci Video Processors datasheet
PDF, 2.7 Mb, Revision: E, File published: Dec 13, 2013
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 684 |
| Package Type | CYE |
| Industry STD Term | FCBGA |
| JEDEC Code | S-PBGA-N |
| Width (mm) | 23 |
| Length (mm) | 23 |
| Thickness (mm) | 2.5 |
| Pitch (mm) | .8 |
| Max Height (mm) | 3.06 |
| Mechanical Data | Download |
Parametrics
| ARM CPU | 1 ARM Cortex-A8 |
| ARM MHz (Max.) | 1000 |
| Applications | Video Security Thin Client Video Conferencing Video Phones |
| Approx. Price (US$) | 43.95 | 1ku |
| DRAM | LPDDR DDR2 DDR3 |
| DSP | 1 C674x |
| DSP MHz (Max.) | 750 |
| EMAC | 10/100/1000 |
| I2C | 4 |
| On-Chip L2 Cache | 512 KB (ARM) 256 KB (DSP) |
| Operating Systems | Linux DSP/BIOS |
| Operating Temperature Range(C) | 0 to 90 |
| PCI/PCIe | PCIe |
| Pin/Package | 684FCBGA |
| Rating | Catalog |
| SPI | 4 |
| UART(SCI) | 6 |
| USB | 2 |
| Video Acceleration | 1 HDVICP |
| Video Port (Configurable) | 2 Output 2 Input 2 SD DACs 1 HDMI TX |
| Video Resolution/Frame Rate | 1080p 60 FPS or less |
Eco Plan
| RoHS | Not Compliant |
| Pb Free | No |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: TMDXEVM8148
DM814x /AM387x Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU200-U
XDS200 USB Debug Probe
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
XDS560v2 System Trace USB & Ethernet Debug Probe
Lifecycle Status: Active (Recommended for new designs) - JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
XDS560v2 System Trace USB Debug Probe
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- TMS320DM814x/AM387x Power Estimation Spreadsheet (Rev. A)PDF, 18 Kb, Revision: A, File published: Sep 10, 2012
This article describes how to model power consumption for a user's application and to present some measured power scenarios for the TMS320DM814x DaVinciв„ў digital media processors and AM387x Sitaraв„ў ARMВ® microprocessors (MPUs) PG2.x and PG3.x samples using a provided power estimation spreadsheet.This article has been contributed to the TI Developer Wiki. To see the most recen - TI814x-DDR3-Init-U-BootPDF, 37 Kb, File published: Oct 31, 2011
This article describes how to initialize the DDR3 and uBoot on the TMS320DM814x DaVinciв„ў digital media processors (DSP) and AM387x ARMВ® microprocessors (MPUs) PG2.x samples using the software leveling process.This article has been contributed to the TI Embedded Processors Wiki. To see the most recently updated version or to contribute, visit this topic at:Canny Edge Detection Implementation on TMS320C64x/64x+ Using VLIBPDF, 97 Kb, File published: Nov 25, 2009
This application note contains instructions for implementing Canny Edge Detection algorithm using VLIB. The general ideas given here can also be applied for an application which calls a sequence of VLIB functions in a block-based manner.Error Detection and Correction Mechanism of TMS320C64x+/C674x (Rev. A)PDF, 80 Kb, Revision: A, File published: Jul 19, 2013
This application report describes the error detection and correction mechanism of the C64x+/C674x megamodule L1P and L2 memories implemented on some devices. Depending on the type of application, these mechanisms are used to either provide diagnostic measures to detect faults in the memory that could lead to unacceptable risk for the user or to increase the availability of the system.High-Speed Interface Layout Guidelines (Rev. G)PDF, 814 Kb, Revision: G, File published: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.Introduction to TMS320C6000 DSP OptimizationPDF, 535 Kb, File published: Oct 6, 2011
The TMS320C6000™ Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications. However to fully leverage the architectural features that C6000™ processors offer code optimization may be required. First this document reviews five key concepts in understanding the C6000 DSP architecture and optimization. ThenModel Line
Series: TMS320DM8148 (17)Manufacturer's Classification
- Semiconductors > Processors > Digital Signal Processors > Media Processors > DaVinci Video Processors
