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LTC2051HV LTC2052 LTC2052 LTC2052HV

Application Notes

• Download
  Delta Sigma ADC Bridge Measurement Techniques &mdash AN96
  PDF, 232 Kb, File published: Jan 17, 2005
  AN96 features several applications that demonstrate how to take full advantage of Linear Technology's delta sigma ADCs when interfacing to sensors. In many cases, signal conditioning can be greatly simplified or eliminated completely. This note explains where it is appropriate to use amplifiers and how to optimize amplifier gain. Also included are discussions on measuring effective number of bits (ENOB) and the relationship to instrument performance, frequency response of delta sigma ADCs, and test techniques. C source code for all of the applications is included to aid firmware development.
  Extract from the document

  Application Note 96
  January 2005
  Delta Sigma ADC Bridge Measurement Techniques
  Mark Thoren
  Introduction In a typical 12-bit measurement system, the signal conditioning amplifier requires a very high gain in order to make
  use of the full ADC input range. A sensor with a 10mV fullscale output requires a gain of 500 to use the full input
  range of a typical 5V input ADC. A filter may be required to
  reduce noise at the expense of settling time. Additional
  difficulties arise when dealing with the large common
  mode voltage typical of a bridge sensor. Most instrumentation amplifiers have a large discrepancy between the
  typical CMRR and guaranteed minimum, which may require an additional trim. Sensors for pressure, load, temperature, acceleration and
  many other physical quantities often take the form of a
  Wheatstone bridge. These sensors can be extremely linear
  and stable over time and temperature. However, most
  things in nature are only linear if you don’t bend them too
  much. In the case of a load cell, Hooke’s law states that the
  strain in a material is proportional to the applied stress—
  as long as the stress is nowhere near the material’s yield
  point (the “point of no return” where the material is
  permanently deformed). The consequence is that a load
  cell based on a resistance strain gauge will have a very
  small electrical output—often only a few millivolts. In
  spite of this, instruments with 100,000 counts of resolution and more are possible. This Application Note presents …

Articles

• Download
  Low Power, DC Accurate Drivers for 18-Bit ADCs &mdash LT Journal
  PDF, 3.4 Mb, File published: Jul 9, 2013
  Extract from the document

  Low Power, DC Accurate Drivers for 18-Bit ADCs
  Guy Hoover A common misconception about 18-bit SAR ADCs is the only way to drive them
  is with a high powered, high speed, low noise op amp or differential driver whose
  DC performance often leaves much to be desired. It is possible to use a low
  power, DC accurate op amp to drive an 18-bit SAR ADC if the input is a DC or low
  bandwidth AC signal and the op amp outputs are given sufficient time to settle.
  Using the single-ended to differential driver of Figure 1, four different low power
  dual op amps were tested to show the trade-offs in using low power drivers.
  This circuit enables the testing of offset voltage, the maximum sample
  rate for DC and AC signals, noise and
  power consumption. The ADC used
  is the LTC2379-18, a 1.6Msps 18-bit
  SAR ADC with an offset of В±9LSBs, INL of
  В±2LSBs and peak-to-peak noise of 5LSBs.
  The four amplifiers used are the
  LT1013, LTC6078, LTC6081 precision and
  LTC2051HV zero-drift dual op amps—
  Table 1 shows a summary of their major
  specs. The circuit supply voltage is the
  voltage applied to the V+ and V– terminals
  of the op amps. This voltage determines
  the power dissipation of the amplifier and
  its maximum signal swing. The voltages …

• Download
  Zero-Drift Operational Amplifier Family in Small-Footprint Packages Features 3µV Maximum DC Offset and30nV/°C Maximum Drift &mdash LT Journal
  PDF, 186 Kb, File published: Nov 1, 2000
  Extract from the document

  DESIGN FEATURES Zero-Drift Operational Amplifier Family
  in Small-Footprint Packages Features
  3ВµV Maximum DC Offset and
  30nV/В°C Maximum Drift
  by David Hutchinson
  Introduction Extended Input
  Common Mode Range
  with Uncompromising CMRR
  At room temperature, and with the
  input common mode level at midsupplies, the parts typically have
  0.5ВµV of input-referred offset and are
  guaranteed to have less than В±3ВµV.
  To ensure this DC accuracy over the
  common mode input range, the
  LTC2050/LTC2051/LTC2052 have 6 exceptionally high CMRR over a wide
  range from the negative supply to
  typically within 0.9V of the positive
  rail, as shown in Figure 1. For
  example, as the input is varied over
  the entire 5V common mode range,
  the input-referred offset changes typically by less than 0.4ВµV. Similar levels
  of PSRR (typically less than 0.1ВµV of
  offset per volt of supply change) and …

Model Line

Manufacturer's Classification

• Signal Conditioning > Amplifiers > Operational Amplifiers (Op Amps) > Precision Amplifiers (Vos | Zero-Drift Amplifiers | Low Power Amplifiers (Is < 1mA/amp) | Low Bias Current Amplifiers (Ib < 100pA) | Rail-to-Rail Amplifiers
• Space & Harsh Environment > Extended Temperature Plastic (H & MP) > Extended Temperature (H & MP) Amplifiers

Other Names:

LTC2051CDDTRPBF, LTC2051CDD TRPBF