EPC2102 - Enhancement-Mode GaN Power Transistor Half Bridge
Preliminary Specification Sheet
Features:
• 98% System Efficiency at 18 A
o 42 VIN to 14 VOUT, 500 kHz o Includes driver, inductor, and output filter • High Frequency Operation • High Density Footprint • Low Inductance Package EPC2102 devices are supplied only in
passivated die form with solder balls
Die Size: 6.05 mm x 2.3 mm Pb-Free (RoHS Compliant), Halogen Free
Applications:
• High Frequency DC-DC Conversion Typical System Efficiency
99
98.5 Efficiency (%) Typical Circuit 98
97.5
97
96.5
96 fsw=300 kHz
fsw=500 kHz 95.5
95
0 2 4 6 8 10 12 14 16 18 20 22 24 26 Output Current (A) VIN = 42 V, VOUT = 14 V
MAXIMUM RATINGS Parameter Value Maximum Drain - Source Voltage (VSW to PGND, VIN to VSW)
Maximum Gate - Source Voltage Range (Gate 1 to VSW, Gate 2 to PGND)
Continuous Drain Current, 25 °C, RθJA = 28 (Q1), 28 (Q2)
Maximum Pulsed Drain Current, 25 °C, Tpulse = 300 µs Q1 Control FET 23 A Q2 Sync FET 23 A Q1 Control FET
Q2 Sync FET Optimum Temperature Range Subject to Change without Notice www.epc-co.com 60 V
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