Datasheet Texas Instruments TLC5510AINSR

ManufacturerTexas Instruments
SeriesTLC5510A
Part NumberTLC5510AINSR
Datasheet Texas Instruments TLC5510AINSR

8-Bit, 20-MSPS Analog-to-Digital Converter (ADC) 24-SO -20 to 75

Datasheets

8-Bit High-Speed Analog-to-Digital Converters datasheet
PDF, 892 Kb, Revision: L, File published: Jun 11, 2003
Extract from the document

Prices

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

Pin24
Package TypeNS
Industry STD TermSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingTLC5510AI
Width (mm)5.3
Length (mm)15
Thickness (mm)1.95
Pitch (mm)1.27
Max Height (mm)2
Mechanical DataDownload

Parametrics

# Input Channels1
Analog Input BW14 MHz
ArchitectureFlash
DNL(Max)0.75 +/-LSB
DNL(Typ)0.3 +/-LSB
ENOB6.8 Bits
INL(Max)1 +/-LSB
INL(Typ)0.4 +/-LSB
Input BufferNo
Input Range4 Vp-p
InterfaceParallel CMOS
Operating Temperature Range-20 to 75 C
Package GroupSO
Package Size: mm2:W x L24SO: 117 mm2: 7.8 x 15(SO) PKG
Power Consumption(Typ)150 mW
RatingCatalog
Reference ModeExt
Resolution8 Bits
SFDR42 dB
SINAD44 dB
SNR46 dB
Sample Rate(Max)20 MSPS

Eco Plan

RoHSCompliant

Design Kits & Evaluation Modules

  • Evaluation Modules & Boards: TSW2200EVM
    TSW2200 Low-Cost Portable Power Supply Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Application Notes

  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, File published: Sep 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, File published: Apr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revision: A, File published: Sep 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, File published: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, File published: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers

Model Line

Series: TLC5510A (3)

Manufacturer's Classification

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)