Datasheet Texas Instruments ADS42JB69IRGCR
Manufacturer | Texas Instruments |
Series | ADS42JB69 |
Part Number | ADS42JB69IRGCR |
Dual-Channel, 16-Bit, 250-MSPS Analog-to-Digital Converter (ADC) 64-VQFN -40 to 85
Datasheets
ADS42JBx9 Dual-Channel, 14- and 16-Bit, 250-MSPS Analog-to-Digital Converters datasheet
PDF, 5.3 Mb, Revision: F, File published: Dec 22, 2014
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Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Packaging
Pin | 64 |
Package Type | RGC |
Industry STD Term | VQFN |
JEDEC Code | S-PQFP-N |
Package QTY | 2000 |
Carrier | LARGE T&R |
Device Marking | AZ42JB69 |
Width (mm) | 9 |
Length (mm) | 9 |
Thickness (mm) | .88 |
Pitch (mm) | .5 |
Max Height (mm) | 1 |
Mechanical Data | Download |
Parametrics
# Input Channels | 2 |
Analog Input BW | 900 MHz |
Architecture | Pipeline |
DNL(Max) | 0.6 +/-LSB |
DNL(Typ) | 0.6 +/-LSB |
ENOB | 12.3 Bits |
INL(Max) | 3 +/-LSB |
INL(Typ) | 3 +/-LSB |
Input Buffer | Yes |
Input Range | 2.5 Vp-p |
Interface | JESD204B |
Operating Temperature Range | -40 to 85 C |
Package Group | VQFN |
Package Size: mm2:W x L | 64VQFN: 81 mm2: 9 x 9(VQFN) PKG |
Power Consumption(Typ) | 1700 mW |
Rating | Catalog |
Reference Mode | Int |
Resolution | 16 Bits |
SFDR | 95 dB |
SINAD | 75.7 dB |
SNR | 75.9 dB |
Sample Rate(Max) | 250 MSPS |
Eco Plan
RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: TSW2170EVM
TSW2170 Crystal Filtered 70MHz Source Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: ADS42JB69EVM
ADS42JB69 Dual-Channel, 16-Bit, 250-MSPS Analog-to-Digital Converter Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- Correcting the Low-Frequency Response of the ADS42LBxx, ADS42JBxx for Time-DomaiPDF, 338 Kb, File published: May 2, 2016
In this application report, simple schemes are described to correct the low-frequency response of ADS42LBxx, ADS42JBxx family of analog-to-digital converters (ADCs). The described schemes are useful for time-domain applications where the ADC samples a low-frequency pulse signal. These schemes are simple to implement in either analog or digital domains with minimal changes to the bill of materials - JESD204B multi-device synchronization: Breaking down the requirementsPDF, 146 Kb, File published: Apr 28, 2015
- LMK04828 as a Clock Source for the ADS42JB69PDF, 1.4 Mb, File published: Nov 14, 2012
ADS42JB69, ADS42LB69, LMK04828 LMK04828 as a clock source for the ADS42JB69 - Analog Applications Journal 2Q 2015PDF, 2.5 Mb, File published: Apr 28, 2015
- Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Mb, Revision: A, File published: Jul 19, 2013
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Mb, Revision: A, File published: May 22, 2015
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, File published: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, File published: Apr 16, 2015
Model Line
Series: ADS42JB69 (3)
- ADS42JB69IRGC25 ADS42JB69IRGCR ADS42JB69IRGCT
Manufacturer's Classification
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)