Datasheet Texas Instruments THS1206CDARG4
| Manufacturer | Texas Instruments |
| Series | THS1206 |
| Part Number | THS1206CDARG4 |
12-Bit, 6 MSPS ADC Quad Ch. (Config.), DSP/uP IF, Integ. 16x FIFO, Channel AutoScan, Low Power 32-TSSOP 0 to 70
Datasheets
THS1206: 12-Bit, 6 MSPS, Simultaneous Sampling Analog-to-Digital Converter datasheet
PDF, 1.1 Mb, Revision: H, File published: Jun 27, 2003
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Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 32 |
| Package Type | DA |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | THS1206 |
| Width (mm) | 6.2 |
| Length (mm) | 11 |
| Thickness (mm) | 1.15 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Download |
Parametrics
| # Input Channels | 4 |
| Analog Voltage AVDD(Max) | 5.25 V |
| Analog Voltage AVDD(Min) | 4.75 V |
| Architecture | Pipeline |
| Digital Supply(Max) | 5.25 V |
| Digital Supply(Min) | 3 V |
| INL(Max) | 1.5 +/-LSB |
| Input Range(Max) | 4 V |
| Input Range(Min) | 1.4 V |
| Input Type | Differential,Single-Ended |
| Integrated Features | N/A |
| Interface | Parallel |
| Multi-Channel Configuration | Simultaneous Sampling |
| Operating Temperature Range | -40 to 125,-40 to 85,0 to 70 C |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 32TSSOP: 89 mm2: 8.1 x 11(TSSOP) PKG |
| Power Consumption(Typ) | 186 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 12 Bits |
| SINAD | 65 dB |
| SNR | 69 dB |
| Sample Rate (max) | 6MSPS SPS |
| Sample Rate(Max) | 6 MSPS |
| THD(Typ) | -70 dB |
Eco Plan
| RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: THS1206M-EVM
THS1206M Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- Synchronizing non-FIFO variations of the THS1206PDF, 219 Kb, File published: Feb 28, 2005
- Designing with the THS1206 High-Speed Data ConverterPDF, 167 Kb, File published: Apr 4, 2000
This application report is intended as a guide in the use of the digital and analog portions of the THS1206 A/D converter. On the digital portion, it discusses the main timing features to explain the requirements for initialization and operation. Two interface examples are presented where the THS1206 is connected to digital signal processors TMS320C54x and TMS320C6201. On the analog portion, it of - Resetting Non-FIFO Variations of the 12-bit THS1206PDF, 38 Kb, File published: May 9, 2002
The THS1207 and THS1209 are non-FIFO variations of the THS1206. They require some special procedures for properly resetting and configuring the device. This application brief helps explain the necessary steps required to get reliable data from these 12-bit, two and four channel simultaneous sampling data converters. - Noise Analysis for High Speed Op Amps (Rev. A)PDF, 256 Kb, Revision: A, File published: Jan 17, 2005
As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu
Model Line
Series: THS1206 (10)
Manufacturer's Classification
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)
