Datasheet Texas Instruments ADS5400IPZP

ManufacturerTexas Instruments
SeriesADS5400
Part NumberADS5400IPZP
Datasheet Texas Instruments ADS5400IPZP

12-bit, 1.0-GSPS Analog-to-Digital Converter (ADC) 100-HTQFP -40 to 85

Datasheets

ADS5400 12-Bit, 1-GSPS Analog-to-Digital Converter datasheet
PDF, 2.3 Mb, Revision: C, File published: Jan 15, 2016
Extract from the document

Prices

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

Pin100
Package TypePZP
Industry STD TermHTQFP
JEDEC CodeS-PQFP-G
Package QTY90
CarrierJEDEC TRAY (10+1)
Device MarkingADS5400I
Width (mm)14
Length (mm)14
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical DataDownload

Parametrics

# Input Channels1
Analog Input BW2150 MHz
ArchitecturePipeline
DNL(Max)2 +/-LSB
DNL(Typ)0.7 +/-LSB
ENOB9.3 Bits
INL(Max)4.5 +/-LSB
INL(Typ)2 +/-LSB
Input BufferYes
Input Range2 Vp-p
InterfaceParallel LVDS
Operating Temperature Range-40 to 85 C
Package GroupHTQFP
Package Size: mm2:W x L100HTQFP: 256 mm2: 16 x 16(HTQFP) PKG
Power Consumption(Typ)2200 mW
RatingCatalog
Reference ModeExt,Int
Resolution12 Bits
SFDR75 dB
SINAD58 dB
SNR59.1 dB
Sample Rate(Max)1000 MSPS

Eco Plan

RoHSCompliant

Design Kits & Evaluation Modules

  • Evaluation Modules & Boards: ADS5400EVM
    ADS5400 12-bit, 1.0-GSPS Analog-to-Digital Converter Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Application Notes

  • Input Impedance Measurement Using ADC FFT Data
    PDF, 275 Kb, File published: Jan 11, 2011
    Texas Instruments has introduced a family of high-speed analog-to-digital converters (ADCs) suited tomeet the demand for high-speed and high-IF sampling systems. To achieve the highest overall system performance, an analog front-end circuit with an antialiasing filter must drive the ADC with the highestpossible dynamic range and lowest distortions. One important parameter of the front-end circ
  • High-Speed Analog-to-Digital Converter Basics
    PDF, 1.1 Mb, File published: Jan 11, 2012
    The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, File published: Sep 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
    PDF, 2.0 Mb, Revision: A, File published: May 22, 2015
  • Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
    PDF, 1.2 Mb, Revision: A, File published: Jul 19, 2013
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, File published: Apr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revision: A, File published: Sep 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, File published: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, File published: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, File published: Apr 16, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, File published: May 18, 2015

Model Line

Series: ADS5400 (2)

Manufacturer's Classification

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)