Datasheet Texas Instruments 74AVC16244DGGRE4
| Manufacturer | Texas Instruments |
| Series | SN74AVC16244 |
| Part Number | 74AVC16244DGGRE4 |
16-Bit Buffer/Driver With 3-State Outputs 48-TSSOP -40 to 85
Datasheets
SN74AVC16244 datasheet
PDF, 831 Kb, Revision: N, File published: Jul 21, 2004
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Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 48 |
| Package Type | DGG |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | AVC16244 |
| Width (mm) | 6.1 |
| Length (mm) | 12.5 |
| Thickness (mm) | 1.15 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Download |
Parametrics
| Bits | 16 |
| F @ Nom Voltage(Max) | 200 Mhz |
| ICC @ Nom Voltage(Max) | 0.04 mA |
| Operating Temperature Range | -40 to 85 C |
| Output Drive (IOL/IOH)(Max) | -12/12 mA |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | AVC |
| VCC(Max) | 3.6 V |
| VCC(Min) | 1.2 V |
| Voltage(Nom) | 1.2,1.5,1.8,2.5,3.3 V |
| tpd @ Nom Voltage(Max) | 3.1,3.3,2.9,1.9,1.7 ns |
Eco Plan
| RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: ADS5232EVM
ADS5232 Dual-Channel, 12-Bit, 65-MSPS Analog-to-Digital Converter Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: ADC08060EVM
ADC08060 8-Bit 60MSPS 1.3mW/MSPS ADC With Internal Sample and Hold Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: ADC08200EVM
ADC08200 8-Bit 200MSPS Low-Power ADC With Internal Sample and Hold Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: ADS5231EVM
ADS5231 Dual-Channel, 12-Bit, 40-MSPS Analog-to-Digital Converter Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: ADC08100EVM
ADC08100 8-Bit 100MSPS 1.3mW/MSPS Analog-to-Digital Converter (ADC) Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- Simultaneous-Switching Performance of TI Logic Devices (Rev. B)PDF, 378 Kb, Revision: B, File published: Feb 23, 2005
Simultaneous-switching noise can generate and propagate glitches in electronic systems. Therefore, system designers are faced with challenges to minimize simultaneous-switching noise, while increasing switching speed and improving signal quality. This report presents the performance of different TI logic devices under various simultaneous-switching conditions. Factors such as the number of bits sw - Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)PDF, 126 Kb, Revision: B, File published: Jul 7, 1999
Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i - AVC Logic Family Technology and Applications (Rev. A)PDF, 148 Kb, Revision: A, File published: Aug 26, 1998
Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control ( - Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)PDF, 390 Kb, Revision: B, File published: Apr 30, 2015
- 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Kb, Revision: B, File published: May 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa - Selecting the Right Level Translation Solution (Rev. A)PDF, 313 Kb, Revision: A, File published: Jun 22, 2004
Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
Model Line
Series: SN74AVC16244 (6)
- 74AVC16244DGGRE4 74AVC16244DGVRG4 SN74AVC16244DGGR SN74AVC16244DGVR SN74AVC16244GQLR SN74AVC16244ZQLR
Manufacturer's Classification
- Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver
