Datasheet Texas Instruments ADS7852Y/250G4

ManufacturerTexas Instruments
SeriesADS7852
Part NumberADS7852Y/250G4
Datasheet Texas Instruments ADS7852Y/250G4

12-Bit, 8-Channel, Parallel Output Analog-to-Digital Converter 32-TQFP -40 to 85

Datasheets

ADS7852: 12-Bit, 8-Channel, Parallel Output Analog-to-Digital Converter datasheet
PDF, 370 Kb, Revision: C, File published: Jul 22, 2004
Extract from the document

Prices

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

Pin32
Package TypePBS
Industry STD TermTQFP
JEDEC CodeS-PQFP-G
Package QTY250
CarrierSMALL T&R
Device MarkingA52Y
Width (mm)5
Length (mm)5
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical DataDownload

Parametrics

# Input Channels8
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)4.75 V
INL(Max)1 +/-LSB
Input Range(Max)5 V
Input TypeSingle-Ended
Integrated FeaturesN/A
InterfaceParallel
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 85 C
Package GroupTQFP
Package Size: mm2:W x L32TQFP: 49 mm2: 7 x 7(TQFP) PKG
Power Consumption(Typ)13 mW
RatingCatalog
Reference ModeExt,Int
Resolution12 Bits
SINADN/A dB
SNR72 dB
Sample Rate (max)500kSPS SPS
Sample Rate(Max)0.5 MSPS
THD(Typ)-77 dB

Eco Plan

RoHSCompliant

Application Notes

  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, File published: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, File published: Apr 16, 2015
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, File published: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

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Manufacturer's Classification

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)