Datasheet Texas Instruments ADS774JPG4
| Manufacturer | Texas Instruments |
| Series | ADS774 |
| Part Number | ADS774JPG4 |
Datasheets
Microprocessor-Compatible Sampling CMOS A/D Converter
PDF, 744 Kb, File published: Sep 27, 2000
Prices
Status
| Lifecycle Status | Lifebuy (Manufacturer has announced that the device will be discontinued, and a lifetime-buy period is in effect) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 28 |
| Package Type | NTD |
| Industry STD Term | PDIP |
| JEDEC Code | R-PDIP-T |
| Package QTY | 13 |
| Carrier | TUBE |
| Device Marking | ADS774JP |
| Width (mm) | 13.525 |
| Length (mm) | 37.4 |
| Thickness (mm) | 4.07 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 6.35 |
| Mechanical Data | Download |
Parametrics
| # Input Channels | 1 |
| Analog Voltage AV/DD(Max)(V) | 5.5 |
| Analog Voltage AV/DD(Min)(V) | 4.5 |
| Approx. Price (US$) | 20.08 | 1ku |
| Architecture | SAR |
| Digital Supply(Max)(V) | 5.5 |
| Digital Supply(Min)(V) | 4.5 |
| INL(Max)(+/-LSB) | 0.5 |
| Input Range(Max)(V) | 10 |
| Input Range(Min)(V) | -10 |
| Input Type | Single-Ended |
| Interface | Parallel |
| Operating Temperature Range(C) | -40 to 85 |
| Package Group | SOIC |
| Package Size(mm2=WxL) | 28SOIC: 184 mm2: 10.3 x 17.9 |
| Power Consumption(Typ)(mW) | 75 |
| Rating | Catalog |
| Reference Mode | Ext Int |
| Resolution(Bits) | 12 |
| SINAD(dB) | 71 |
| SNR(dB) | 72 |
| Sample Rate (max)(SPS) | 125kSPS |
| THD(Typ)(dB) | -77 |
Eco Plan
| RoHS | Compliant |
| Pb Free | Yes |
Application Notes
- CDAC Architecture Gives ADC574 Pinout /Sampling, Low Power, New Input RangesPDF, 54 Kb, File published: Sep 27, 2000
This application note compares basic current-mode successive approximation A/Ds with CDAC-based architectures, and shows how adding a resistor divider network to the CDAC input permits the Burr-Brown - Complete Temp Data Acquisition System From a Single +5V SupplyPDF, 68 Kb, File published: Oct 2, 2000
The CMOS ADS574 and ADS774 are drop-in replacements for industry standard ADC574 analog-to-digital converter, offering lower power and the capability to operate from a single +5V supply. The switched - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, File published: May 18, 2015
AB-084 Analog-to-Digital Grounding Practices Affect System Performance - A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (ΔΣ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specificati - Interleaving Analog-to-Digital ConvertersPDF, 64 Kb, File published: Oct 2, 2000
It is tempting when pushing the limits of analog-to-digital conversion to consider interleaving two or more converters to increase the sample rate. However, such designs must take into consideration s - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, File published: Apr 16, 2015
AB-082 Principles of Data Acquisition and Conversion - What Designers Should Know About Data Converter DriftPDF, 95 Kb, File published: Oct 2, 2000
Exactly how inaccurate will a change in temperature make an analog-to-digital or digital-to-analog converter? As designers are well aware, a 12-bit device may provide a much lower accuracy at its oper
Model Line
Series: ADS774 (9)
Manufacturer's Classification
- Semiconductors > Data Converters > Analog to Digital Converter > Precision ADC (<=10MSPS)
